View SDA9400_2020657.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

preliminary data sheet sda 9400 scarabaeus scan rate converter usi n g e mb e dd e d dram technology units edition feb. 28, 2001 6251-551-1pd
micronas 2 preliminary data sheet doc u me nt chan ge note ds 1 da t e secti on/ pa g e c h ang es c o mp ar ed to pr e v iou s is sue d ep ar tme n t 12.0 1 .99 c ha nge s t o the pr ev io us is s ue v e r s i on 0 3 , e d i t io n 05 /98 a r e ma r k ed wit h a cha nge bar hl i v ce 05.0 5 .99 p a ge 8 6 es d cd m mo del ad ded , -1.5 k v , . .., 1, 5 k v iv ce 26.0 4 .00 a ll pr elim inary da t a shee t v e r s ion 0 1 , edition 0 4 /0 0 up date new log o , r e m o v a l of c h a nge bar s cnp hn p d 1) . . . d s = doc u ment s t at e, com pares t o block 4 of docum ent numbe r
micronas 3 preliminary data sheet sda 9400 1 general description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 system description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6.1 input sync controller (isc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6.2 input format conversion (ifc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.3 low data rate processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6.3.1 vertical compression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 6.3.2 horizontal compression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.3.3 multipicture display. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 6.3.4 noise reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 6.3.5 noise measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 6.3.6 motion detection for scan rate conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 6.3.7 global motion, movie mode and phase detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 6.4 clock concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 6.5 output sync controller (osc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 6.5.1 hout generator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42 6.5.2 vout generator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44 6.5.3 operation mode generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46 6.5.4 principles of scan rate conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 6.5.5 window generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 6.6 output format conversion (ofc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 6.7 high data rate processing (hdr) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 6.8 i2c bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 6.8.1 i2c bus slave address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64 6.8.2 i2c bus format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64 6.8.3 i2c bus commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66 6.8.4 detailed description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69 7 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 8 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 9 characteristics (assuming recommended operating conditions) . . . . . . . . . . 89 10 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 11 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 11.1 i2c-bus timing start/stop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 11.2 i2c-bus timing data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
micronas 4 preliminary data sheet sda 9400 11.3 timing diagram clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 11.4 clock circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 12 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
sda 9400 micronas 5 preliminary data sheet 1 general description the sda 9400 is a new component of the micronas megavision ? ic set in a 0.35 m embedded dram technology (frame memory embedded). the sda 9400 is pin compatible to the sda 9401 (field memory embedded). the sda 9400 comprises all main functionalities of a digital featurebox in one monolithic ic. the scan rate conversion to 100/120 hz interlaced (50/60 hz progressive) is based on a motion adaptive algorithm. the scan rate converted picture can be vertically expanded. the sda 9400 has a freerunning mode, therefore features like scan rate conversion to e.g. 70, 75 hz with joint lines or multiple picture display (e.g. tuner scan) are possible. due to the frame based signal processing, the noise reduction has been greatly improved. furthermore separate motion detectors for luminance and chrominance have been implemented. for automatic controlling of the noise reduction parameters a noise measurement algorithm is included, which measures the noise level in the picture or in the blanking period. in addition a spatial noise reduction is implemented, which reduces the noise even in the case of motion. the input signal can be compressed horizontally and vertically with a certain number of factors. therefore split screen is supported. beside these additional functions like coloured background, windowing and flashing are implemented. 2 features two input data formats - 4:2:2 luminance and chrominance parallel (2 x 8 wires) - itu-r 656 data format (8 wires) two different representations of input chrominance data - 2?s complement code - positive dual code flexible input sync controller flexible compression of the input signal - digital vertical compression of the input signal (1.0, 1.25, 1.5, 1.75, 2.0, 3.0, 4.0) - digital horizontal compression of the input signal (1.0, 2.0, 4.0) noise reduction - motion adaptive spatial and temporal noise reduction (3d-nr) - temporal noise reduction for luminance frame based or field based - temporal noise reduction for chrominance field based - separate motion detectors for luminance and chrominance - flexible programming of the temporal noise reduction parameters - automatic measurement of the noise level (5 bit value, readable by i2c bus) 3-d motion detection - high performance motion detector for scan rate conversion - global motion detection flag (readable by i2c bus) - movie mode and phase detector (readable by i2c bus)
sda 9400 micronas 6 preliminary data sheet tv mode detection by counting line numbers (pal, ntsc, readable by i2c bus) embedded memory - 5 mbit embedded dram core for field memories - 192 kbit embedded dram core for line memories flexible clock and synchronization concept - decoupling of the input and output clock system possible scan rate conversion - motion adaptive 100/120 hz interlaced scan conversion - motion adaptive 50/60 hz progressive scan conversion - simple static interlaced and progressive conversion modes for 100/120 hz interlaced or 50/60 hz progressive scan conversion: e.g. abab, aabb, aa*b*b, aaaa, bbbb, ab, aa* - simple progressive scan conversion with joint lines: 50 hz -> 60, 70, 75 hz progressive 60 hz -> 70, 75 hz progressive - large area and line flicker reduction flexible digital vertical expansion of the output signal (1.0, ... [1/32] ... , 2.0) flexible output sync controller - flexible positioning of the output signal - flexible programming of the output sync raster - external synchronization by backend ic possible (e.g. split screen for one tv channel with joint lines and one pc vga channel) signal manipulations - insertion of coloured background - vertical and/or horizontal windowing with four different speed factors - flash generation (for supervising applications, motion flag readable by i2c bus) - still frame or field - support of split screen applications - multiple picture display - tuner scan (4 and 16 times for 4:3, 12 times for 16:9 tubes) - support of multi picture display with pip or front-end processor with integrated scaler (e.g. 9 times display of pip pictures, picture tracking, random pictures, still-in-moving picture, moving-in-still picture) i2c-bus control (400 khz) p-mqfp-64 package 3.3 v 5% supply voltage
sda 9400 micronas 7 preliminary data sheet 3 block diagram the sda 9400 contains the blocks, which will be briefly described below: isc - flexible input sync controller ifc - input format conversion ldr - low data rate processing (noise reduction and measurement, vertical compression, horizontal compression, motion detector for scan rate conversion, movie mode and phase detector) mc - memory controller osc - flexible output sync controller ofc - output format conversion hdr - high data rate processing (scan rate conversion, vertical expansion) i2c - i2c bus interface pll1/2 - pll for frequency doubling lm - line memory core ed - edram core lm line memory ldr vertical, horizontal decimation noise reduction and measurement motion detector movie mode and phase detection ed edram interfaces data buffer voltage control test controller mc memory controller hdr scan rate conversion vertical interpolation ifc input format conversion i2c i2c bus interface yin sda scl uvin lm line memory isc input sync controller osc output sync controller yout uvout vout/vext hout/hext href hin vin clk1 ofc output format conversion pll1 clock doubling pll2 clock doubling clkout x1/clk2 x2 interlaced bd9400s syncen reset
sda 9400 micronas 8 preliminary data sheet 4 pin configuration uvout2 uvout1 uvout0 uvin0 vdd2 vdd1 scl sda reset hin vin clk1 vss2 test sda 9400 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 vss1 vdd1 yout0 yout1 yout2 yout3 yout4 yout5 yout6 yout7 vss1 vdd2 uvout7 uvout6 uvout5 uvout4 uvout3 syncen vss1 vdd1 yin0 yin1 yin2 yin3 yin4 yin5 yin6 yin7 uvin7 uvin6 uvin5 uvin4 uvin3 uvin2 uvin1 vss2 vdd1 vout/vext hout/hext href vss1 vdd2 x1/clk2 x2 clkout vss1 interlaced pin49400 vss2 vdd2 vdd2
sda 9400 micronas 9 preliminary data sheet 5 pin description pin no. name type description 2,8,24,42,55 vss1 s supply voltage ( v ss = 0 v ) 9,25,41,56 vdd1 s supply voltage ( v dd = 3.3 v ) 36,52,58 vss2 s supply voltage ( v ss = 0 v ) 35,51,53,57, 59 vdd2 s supply voltage ( v dd = 3.3 v ) 43,..,50 yin0...7 i/ttl data input y (see input data format) 31,..,34;37,..., 40 uvin0...7 i/ttl pd data input uv (for 4:2:2 parallel, see input data format) (for ccir 656, see input data format) 30 reset i/ttl system reset. the reset input is low active. in order to ensure correct operation a " power on reset " must be performed. the reset pulse must have a minimum duration of two clock periods of the system clock clk1. 23 hin i/ttl pd h-sync input (only for full ccir 656) 22 vin i/ttl pd v-sync input (only for full ccir 656) 29 syncen i/ttl synchronization enable input 21 sda i/o i 2 c-bus data line (5v ability) 20 scl i i 2 c-bus clock line (5v ability) 54 clk1 i/ttl system clock 1 17,..,10 uvout0...7 o/ttl data output uv (see output data format) 7,..,3;1;64;63 yout0...7 o/ttl data output y (see output data format) 62 href o/ttl horizontal active video output 61 vout/ vext i/o/ ttl exsyn=0 (i2c-bus parameter): v-sync output exsyn=1: external v-sync input for output part 60 hout/ hext i/o/ ttl exsyn=0 (i2c-bus parameter): h-sync output exsyn=1: external h-sync input for output part 18 interlaced o/ttl interlace signal for ac coupled vertical deflection 28 x1 / clk2 i/ttl crystal connection / system clock 2 27 x2 o/ana crystal connection 26 clkout o/ttl clock output (depends on i2c parameters clk11en, clk21en, freqr, see also clock concept on page 37) 19 test i/ttl test input, connect to v ss for normal operation
sda 9400 micronas 10 preliminary data sheet s: supply, i: input, o: output, ttl: digital (ttl) ana: analog pd: pull down
sda 9400 micronas 11 preliminary data sheet 6 system description 6.1 input sync controller (isc) input signals the input sync controller derives framing signals from the h- and v-sync for the input data processing. the framing signals depend on different parameters and mark the active picture area. input parameter the distance between the incoming h-syncs in system clocks of clk1 must be even. signals pin number description hin 23 horizontal synchronization signal (polarity programmable, i2c bus parameter 01h hinpol, default: high active) vin 22 vertical synchronization signal (polarity programmable, i2c bus parameter 01h vinpol, default: high active) syncen 29 enable signal for hin and vin signal, low active (see also input format conversion (ifc) on page 15) lines per field pixels per line nalip+pd (alpfip*2) (verpos*2) (verwidth*2) (applip*32)*clk1 (horpos* 32)*clk1 (horwidth*32)* clk1 (napipdl*4 + napipph + pd)* clk1 hin vin inpar01 pd - processing delay
sda 9400 micronas 12 preliminary data sheet input write parameter inside of the sda 9400 a field detection block is necessary for the detection of an odd (a) or even (b) field. therefore the incoming h-sync h1 (delayed hin signal, delay depends on napipdl and napipph) is doubled (h2 signal). depending on the phase position of the rising edge of the vin signal an a (rising edge between h1 and h2) or b (rising edge between h2 and h1) field is detected. for proper operation of the field detection block, the vin must be delayed depending on the delay of the hin signal (h1). the figure below explains the field detection process and the functionality of the vindel parameter (inside the sda 9400 the delayed vin signal is called vd and the detected field signal is called ffd). parameter [default value] subaddress description nalip [20] 02h not active line input defines the number of lines from the v-sync to the first active line of the field alpfip [144] 03h active lines per field input defines the number of active lines naplip napipdl [0] napipph [0] 00h, 04h not active pixels per line input defines the number of pixels from the h-sync to the first active pixel of the line. the number of pixels is a combination of napipdl and napipph. applip [45] 05h active pixels per line input defines the number of active pixels pimode 1: on 0: off [0] 00h picture insert mode allows the insertion of an arbitrary picture with the horizontal and vertical width defined by verwidth and horwidth at the position defined by verpos and horpos verpos [0] 08h vertical position defines the number of lines from the first active line to the first active line of an inserted pic- ture verwidth [0] 07h vertical width defines the number of lines (vertical width) of an inserted picture horpos [0] 0ah horizontal position defines the number of pixels from the first active pixel to the first active pixel of an inserted picture horwidth [0] 09h horizontal width defines the number of pixels (hori- zontal width) of an inserted picture
sda 9400 micronas 13 preliminary data sheet field detection and vin delay input write parameter in case of non-standard signals the field order is indeterminate (e.g. aaa... , bbb... , aaabaaab..., etc.). therefore a special filtering algorithm is implemented, which can be switched on by the parameter vcrmode. it is recommended to set the parameter vcrmode=1. in other case (vcrmode=0) an additional internal signal vtseq is generated. this signal goes high (vtseq=1), if at least the last two fields were identical. due to the fixed storage places of the fields in the internal memory block, this information is necessary for the scan rate conversion processing (see also output sync controller (osc) on page 40, it is recommended in case of vcrmode=0 to choose an adaptive operation mode). the opdel parameter is used to adjust the outgoing v-sync vout in relation to the incoming delayed v-sync vin. in case of 50 hz to 100 hz interlaced scan rate conversion the opdel parameter should be greater than half the number of lines of a field plus the internal processing delay (8 lines). parameter [default value] subaddress description vindel [0] 01h delay of the incoming v-sync vin (must be adjusted depending on the delay of the hin signal) fieinv 1: field a=1 0: field a=0 [0] 00h inversion of the internal field polarity vcrmode 1: on 0: off [1] 00h in case of non standard interlaced signals (vcr, play- stations) a filtering of the internal field signal has to be done (should also be used for normal tv signals) h1 h2 vin ffd vd clk1 (vindel * 128 + 1) * tclk1 field 1(a) vd field 2(b) ffd x x (vindel * 128 + 1) * tclk1 vin fielddet
sda 9400 micronas 14 preliminary data sheet input write parameter the internal line counter is used to determine the information about the standard of the incoming signal. input read parameter the figure below shows applications of the picture insert mode. for this feature an additional pip circuit (e.g. sda 9388, sda 9488/89) is necessary. together with the pip iv circuit (sda 9488/89) also split screen applications like double window are possible. in the picture insert mode motion adaptive scan rate conversion modes (e.g. soft mix i) are not supported (see also operation mode generator on page 46). the compression of the inserted picture has also be done by the external pip or front-end processor. picture insert mode: application examples picture tracking, random pictures parameter [default value] subaddress description opdel [170] 06h delay (in number of lines) of the internal v-sync (delayed vin) to the outgoing v-sync (vout) parameter subaddress description tvmode 33h tv standard of the incoming signal: 1: ntsc 0: pal track01
sda 9400 micronas 15 preliminary data sheet 6.2 input format conversion (ifc) input signals the sda 9400 accepts at the input side the sample frequency relations of y : (b-y) : (r-y): 4:2:2 and ccir 656. in case of ccir 656 three modes are supported (format=11 means full ccir 656 support, including h-, v-sync and field signal, format=01 means only data processing, h- and v- sync have to be added separately according pal/ntsc norm, format=10 means only data processing, h- and v-sync have to be added separately according ccir656-pal/ntsc norm). the representation of the samples of the chrominance signal is programmable as positive dual code (unsigned, parameter twoin=0) or two's complement code (twoin=1, see also i2c bus format on page 64, i2c bus parameter 00h). inside the sda 9400 all algorithms assume positive dual code. input data formats x ab : x: signal component a: sample number b: bit number signals pin number description yin0...7 43, 44, 45, 46, 47, 48, 49, 50 luminance input uvin0...7 31, 32, 33, 34, 37, 38, 39, 40 chrominance input data pin ccir 656 format = 1x format = 01 4:2:2 parallel format = 00 yin7 u 07 y 07 v 07 y 17 y 07 y 17 yin6 u 06 y 06 v 06 y 16 y 06 y 16 yin5 u 05 y 05 v 05 y 15 y 05 y 15 yin4 u 04 y 04 v 04 y 14 y 04 y 14 yin3 u 03 y 03 v 03 y 13 y 03 y 13 yin2 u 02 y 02 v 02 y 12 y 02 y 12 yin1 u 01 y 01 v 01 y 11 y 01 y 11 yin0 u 00 y 00 v 00 y 10 y 00 y 10 uvin7 u 07 v 07 uvin6 u 06 v 06 uvin5 u 05 v 05 uvin4 u 04 v 04 uvin3 u 03 v 03 uvin2 u 02 v 02 uvin1 u 01 v 01 uvin0 u 00 v 00
sda 9400 micronas 16 preliminary data sheet input sync formats the amplitude resolution for each input signal component is 8 bit, the maximum clock frequency is 27 mhz. consequently the sda 9400 is dedicated for application in high quality digital video systems. the figure below shows the generation of the internal h- and v-syncs in case of full ccir 656 mode. the h656 sync is generated after the eav. the v656 and f656 signals change synchronously with the eav timing reference code. explanation of 656 format the figure below explains the functionality of the syncen signal. the sda 9400 needs the syncen (synchronization enable) signal, which is used to gate the yin, uvin as well as the hin and the vin signal. this is implemented for front-ends which are working with 13.5 mhz and a large format hin vin yin uvin 00 pal/ntsc pal/ntsc 4:2:2 4:2:2 01 (ccir 656 only data) pa l/n tsc pal/nts c ccir 656 x 10 ccir 656 ccir 656 ccir 656 x 11 (full ccir 656) x x ccir 656 x clk1 (27 mhz) u0 y0 v0 y1 u2 y3 yin ccir 656 interface sav eav 288 tclk1(pal) 276 tclk1(ntsc) eav 1728 tclk1(pal) 1716 tclk1(ntsc) eav x x eav x x sav x clk1 (27 mhz) yin x h656 eav v656 (e.g.) f656 (e.g.) 11111111 00000000 00000000 1fv1p 3 p 2 p 1 p 0 sav 11111111 00000000 00000000 1fv0p 3 p 2 p 1 p 0 f = 0 during field 1(a) f = 1 during field 2(b) v = 0 elsewhere v = 1 during field blanking msb lsb
sda 9400 micronas 17 preliminary data sheet output delay time for yin, uvin, hin and vin (e.g. micronas vpc32xx, output delay: 35 ns). for this application the half system clock clk1 (13.5 mhz) from the front-end should be provided at this pin. in case the front-end is working at 27.0 mhz with sync signals having delay times smaller than 25 ns, this input can be set to low level (syncen= v ss ) (e.g. micronas sda 9206, output delay: 25 ns). thus the signals yin, uvin, hin and vin are sampled with the clk1 system clock when the syncen input is low. syncen signal the figure below shows the input timing and the functionality of the napipdl and napipph parameter in case of ccir 656 and 4:2:2 parallel data input format for one example. the signals hinint, yinint and uvint are the internal available sampled input signals. input timing clk1 y0 y1 y2 y3 u0 v0 u2 v2 syncen yin uvin x x yinen uvinen y0 y1 y2 y3 u0 v0 u2 v2 x x hin/vin hinen/vinen syncen clk1 u0 y0 v0 y1 u2 y2 v2 y3 xxx y0 y1 y2 y3 xxx u0 v0 u2 v2 xxx yin yin uvin ccir 656 interface 4:2:2 interface yinint u4 y4 y4 u4 hinint uvinint y0 u0 v0 y1 u2 y2 v2 y3 u4 u0 v0 u2 v2 y0 y1 y3 y4 u0 v0 u2 v2 yinint uvinint (napipdl* 4 + napipph + 7) * tclk1 =(0 * 4 + 2 + 7) * tclk1 = 9 tclk1 (e.g.) (napipdl* 4 + napipph + 7) * tclk1 =(0 * 4 + 3 + 7) * tclk1 = 10 tclk1 (e.g.) hin ifc01
sda 9400 micronas 18 preliminary data sheet 6.3 low data rate processing the next figure shows the block diagram of the low data rate processing block. the input signal can be vertically and horizontally compressed by a limited number of factors. in case of multipicture mode the internal multipicture controller will use both compression blocks to control the different modes. furthermore the input signal can be processed by different noise reduction algorithms to reduce the noise in the signal. a motion detector calculates motion values for a motion adaptive scan rate conversion processing. the movie mode and phase detector determines the information, whether the input signal is a camera scene or movie scene. the global motion detector derives a one bit signal, which indicates that the input signal is a still picture or a moving picture. the noise measurement block determines the noise level of the input signal. block diagram of low data rate processing the different blocks and the corresponding parameters will be described now in more detail. 6.3.1 vertical compression the vertical compression compresses the incoming signal vertically by a constant factor given by the parameter vdecon. for the y and uv signal different filter characteristics are used. the vertical compression can be switched off. for the multipicture modes the factors vdecon 2, 3 and 4 are necessary. different filter characteristics are used for the factors 3 and 4. high quality vertical compression for double window applications is possible, because the filter characteristic is optimized for the factor 1.5. the table below shows the relation between the parameter vdecon and the compression factor. input write parameter: vdecon vdecon (1ch) 0 vertical compression off 1 factor 1.25 2 factor 1.5 3 factor 1.75 4 factor 2.0 5 factor 3.0 6 factor 4.0 7 not defined line memories yin uvin y to memory uv to memory bdldr01 vertical compression horizontal compression multipicture controller spatial noise reduction temporal noise reduction noise measurement motion detector for scan rate conversion global motion and movie mode and phase detection y from memory uv from memory multipic, picpos, yborder, uborder, vborder nmline, nmalg noiseme vdecon, vcsnron hdecon, hcsnron snron nron gmotion, movmo, movph motion value to memory
sda 9400 micronas 19 preliminary data sheet inside the sda 9400 the number of active lines per field depends on the chosen vertical compression factor vdecon (see also output sync controller (osc) on page 40). 6.3.2 horizontal compression the horizontal compression compresses the incoming signal horizontally by a constant factor. for the y and uv signal the same filter characteristics are used. the horizontal compression can be switched off. the table below shows the relation between the parameter hdecon and the compression factor. input write parameter: hdecon the applip (active pixels per line input, see also input sync controller (isc) on page 11) value defines the length of an active line. inside the sda 9400 the number of active pixels per line is appl (active pixels per line) and its value depends on the chosen horizontal compression factor hdecon. the table below explains the connection between appl and applip (see also output sync controller (osc) on page 40). connection between appl and applip hdecon (1ch) 00 no horizontal compression 01 factor 2 10 factor 4 11 not defined mode appl no horizontal compression (hdecon = ?00?) applip horizontal compression, factor 2 (hdecon = ?01?) (applip + 1) / 2 horizontal compression, factor 4 (hdecon = ?10?) (applip + 3) / 4 multipic > ?0? (dominant, see also multipicture display on page 20) 45
sda 9400 micronas 20 preliminary data sheet 6.3.3 multipicture display the figures below show the different ?multi picture modes? as they are represented on the display. fourfold multi picture twelvefold multi picture sixteenfold multi picture picpos =0 picpos =1 picpos=3 picpos =2 picpos=0 picpos=4 picpos=8 picpos=9 picpos=10 picpos=11 picpos=7 picpos=6 picpos=5 picpos=1 picpos=2 picpos=3 picpos=0 picpos=1 picpos=2 picpos=3 pi c p os = 7 pi c p os = 11 pi c p os = 15 pi c po s = 14 pi c p os = 13 picpos =12 picpos=8 picpos=9 picpos=10 pic p o s= 6 pi c p os = 5 picpos =4
sda 9400 micronas 21 preliminary data sheet the three different ?multi picture modes? can be selected by the parameter multipic. multipic=0 defines normal operation without compression. the table below explains the performed compressions depending on the ?multi picture mode? and the corresponding aspect ratio of the display. input write parameter: multipic to get a ?multi picture display? the following executions must be performed: entering a ?multi picture mode? is defined by transmitting a value multipic>0. this value of multipic must not be equal to the previous value of multipic. during the following two fields the memory will be completely filled with a constant colour defined by the parameters yborder, uborder, vborder. this colour is identical to the background and the borders of the multi picture display. the same procedure is performed when the ?multi picture mode? changes from a value multipic>0 to another value multipic>0. beginning with the following field the compressed input picture is written at the position picpos addressed via i2c-bus. the user has to address all possible positions picpos one after the other to build a complete multi picture display. in sequence, the background colour is replaced by the small pictures. the not overwritten areas of the background colour form the borders of the multi picture display. the pictures can be taken from the same source (?shots of a sequence?) or from different sources (?tuner scanning?). the actual addressed picture is moving until ?freeze mode? is activated. before entering ?multi picture mode? the ?h-and-v-freerunning mode? (see also output sync controller (osc) on page 40) should be activated via the i2c bus bits houtfr and voutfr, especially when ?tuner scanning? will be performed. the ?h-and-v-freerunning mode? avoids synchronization problems of the display during changing the tuner channel. the values of alpfip (active lines per field input, see also input sync controller (isc) on page 11), and alpfop (active lines per field output, see also output sync controller (osc) on page 40) must be set to 144 or 121, respectively. only these standard signals corresponding to pal and ntsc systems are supported. a mixture of pal and ntsc signals is also possible. input write parameter multipic (1bh) horizontal compression vertical compression aspect ratio of the display 00 (multi picture off) normal operation, no compression 01 (fourfold) 2 : 1 2 : 1 4 : 3 10 (twelvefold) 4 : 1 3 : 1 16 : 9 11 (sixteenfold) 4 : 1 4 : 1 4 : 3 parameter subaddress description multipic 1bh defines the multi picture modes picpos 1bh position of the picture in the multi picture mode (only valid for multipic>0) yborder 17h y background value uborder 18h u background value
sda 9400 micronas 22 preliminary data sheet the 100 hz conversion mode should be aabb, aaaa or bbbb for dc coupled deflection units and aa*b*b, aaaa or bbbb for ac coupled deflection units as explained in the following table. for progressive conversion the a+a* or b+b* modes are recommended. motion values are not calculated in ?multi picture mode?. a*, b* mean raster interpolated fields (not motion adaptive, see also operation mode generator on page 46). interlaced and progressive conversion in multi picture mode the borders are fixed to a width of 16 pixels in horizontal direction. in vertical direction the border widths are also fixed, the number of lines, however, depends on the tv standard of the input and the display. vborder 18h v background value freeze 1: on 0: off 1bh freeze mode (frozen picture) stopmode rmode raster sequence comment 0000 (abab mode i interlaced) 0 ??= (100/120 hz) motion blur possible 0001 (aa*b*b mode i interlaced) 0 ?? (100/120 hz) reduced vertical resolution 0010 (aabb mode i interlaced) 0 ?? (100/120 hz) recommended 0100 (multipicture mode i, aaaa) 0 ?? (100/120 hz) recommended 0101 (multipicture mode ii, bbbb) 0 ?? (100/120 hz) recommended 0110 (aaaa mode) 0 (100/120 hz) recommended 0111 (bbbb mode) 0 ???? (100/120 hz) recommended 0000, 0100, 0110 (ab modei, progressive) 1 ?=? (50/60 hz) motion blur possible 0001, 0101 (aa* mode i-ii, progressive) 1 ?=? (50/60 hz) recommended 0111 (b*b mode, progressive) 1 ?=? (50/60 hz) recommended parameter subaddress description
sda 9400 micronas 23 preliminary data sheet 6.3.4 noise reduction the figure below shows a block diagram of the spatial and temporal motion adaptive noise reduction (first order iir filter). the spatial noise reduction of the luminance differs from the spatial noise reduction of the chrominance. the structure of the temporal motion adaptive noise reduction is the same for the luminance as for the chrominance signal. block diagram of noise reduction 6.3.4.1 spatial noise reduction normally a spatial noise reduction reduces the resolution due to the low pass characteristic of the used filter. therefore the spatial noise reduction of the sda 9400 works adaptive on the picture content. the low pas filter process is only executed on a homogeneous area. that?s why an edge detection controls the low pass filter process and depending on the result of the edge detection the pixels for the low pass filter are chosen. the next figure shows a block diagram of the spatial noise reduction. for the uv signal only a simple spatial noise reduction algorithm (vertical and/or horizontal low pass filtering) is implemented. yin spatial noise reduction field delay frame delay dtnron 0 1 yr motion detector field delay uv1 motion detector uvin tnrsel 0 1 nr01 dy duv spatial noise reduction snron vcsnron, hcsnron tnrcly, tnrhoy, tnrkoy, tnrvay, tnrfiy, nron tnrclc, tnrhoc, tnrkoc, tnrvac, tnrfic, nron ky kuv ysnr uvsnr
sda 9400 micronas 24 preliminary data sheet block diagram of spatial noise reduction input write parameter in case of vdecon>0 or hdecon>0 or multipic>0 (see also vertical compression on page 18, see also horizontal compression on page 19, see also multipicture display on page 20) spatial noise reduction is not possible. 6.3.4.2 motion adaptive temporal noise reduction the equation below describes the behaviour of the temporal adaptive noise reduction filter. the same equation is valid for the chrominance signal. depending on the motion in the input signal, the k-factor ky (kuv) can be adjusted between 0 (no motion) and 15 (motion) by the motion detector. the k-factor for the chrominance filter can be either ky (output of the luminance motion detector, tnrsel=0) or kuv (output of the chrominance motion detector, tnrsel=1). for the luminance parameter subaddress description snron 1: on 0: off 1dh spatial noise reduction of luminance signal vcsnron 1: on 0: off 1dh vertical spatial noise reduction of chrominance hcsnron 1: on 0: off 1dh horizontal spatial noise reduction of chrominance yin lm lm edge detection lp ysnr snron nr02 1 0 lm lm uvin lp lp vcsnron 1 0 hcsnron uvsnr 1 0
sda 9400 micronas 25 preliminary data sheet signal the delay of the feed back path can be either a field delay (dtnron=0) or a frame delay (dtnron=1) (block diagram of noise reduction). equation for temporal noise reduction (luminance signal) equation for temporal noise reduction (chrominance signal) the next figure shows the motion detector in more detail. temporal noise reduction can be switched off by nron (nron=0). the parameter tnrfiy/c switches between a fixed noise reduction k- factor tnrvay/c (tnrfiy/c=0) or a motion adaptive noise reduction k-factor (tnrfiy/c=1). block diagram of motion detector in case of adaptive noise reduction the k-factor depends on the detected ?motion? (see figure above). the ?motion?-ky/kuv characteristic curve (lut) is fixed inside the sda 9400, but the characteristic curve can be changed by two parameters: tnrhoy/c and tnrkoy/c. tnrhoy/c shifts the curve horizontally and tnrkoy/c shifts the curve vertically. for a fixed characteristic curve, the sensitivity of the motion detector is adjustable by tnrcly/c. yout 1 ky + 16 --------------- - ysnr yr ? ? yr + = uvout 1 k + 16 ------------ - uvsnr uv 1 ? ? uv 1 k ; + ky kuv ; ? == tnrcly/c+1 tnrhoy/c lut tnrkoy/c+1 mux 1 0 tnrvay/c mux 15 ky/uv 1 0 nron nr01 dy/uv tnrfiy/c motion motion detection 0
sda 9400 micronas 26 preliminary data sheet lut for motion detection i lut for motion detection ii parameter tnrvay/c parameter tnrhoy/c and tnrkoy/c parameter 0 (minimum value) 15 (maximum value) tnrvay/c strong noise reduction (not motion adaptive, ky/k=0) no noise reduction (not motion adaptive, ky/k=15) parameter range tnrhoy/c -32, ... , 31 tnrkoy/c -8, ..., 7 51015202530 motion ky/kuv 5 10 15 nr02 tnrkoy/c tnrhoy/c=0 tnrkoy/c=-1 tnrkoy/c=-8 tnrhoy/c=0 tnrkoy/c=7 tnrhoy/c=0 51015202530 motion ky/kuv 5 10 15 nr03 tnrhoy/c tnrhoy/c=0 tnrkoy/c=-1 tnrkoy/c=-1 tnrhoy/c=-15 tnrkoy/c=-1 tnrhoy/c=15
sda 9400 micronas 27 preliminary data sheet parameter tnrcly input write parameter 6.3.5 noise measurement the noise measurement algorithm can be used to change the parameters of the temporal noise reduction processing depending on the actual noise level of the input signal. this is done by the i2c- bus controller which reads the noiseme value, and sends depending on this value different parameter sets to the temporal noise reduction registers of the sda 9400. the noiseme value can be interpreted as a linear curve from no noise (0) to strong noise (30). value 31 indicates an overflow status and can be handled in different ways: strong noise or measurement failed. two measurement algorithms are included, which can be chosen by the parameter nmalg. in case nmalg=1 the noise is measured during the vertical blanking period in the line defined by nmline. for nmalg=0 the noise is measured during the first active line. in both cases the value is determined by averaging over several fields. the figure below shows an example for the noise measurement. the nmline parameter determines the line, which is used in the sda 9400 for the measurement. in case of vindel=0 and nmline=0 line 3 of the field a and line 316 of the field b is chosen. in case of vindel=0 and nmline=3 line 6 of the field a and line 319 of the field b is chosen. parameter 0 (minimum value) 15 (maximum value) tnrcly/c maximum sensitivity for motion -> strong noise reduction minimum sensitivity for motion -> weak noise reduction parameter subaddress description tnrsel 1: separate 0: luminance motion detector 1dh switch for motion detection of temporal noise reduction of chrominance signal dtnron 1: frame 0: field 1dh delay for temporal noise reduction of luminance signal tnrfiy/c 1: off 0: on 21h/22h switch for fixed k-factor value defined by tnrvay/c tnrvay/c 20h fixed k-factor for temporal noise reduction of lumi- nance/chrominance tnrhoy/c 21h/22h horizontal shift of the motion detector characteristic tnrkoy/c 1fh vertical shift of the motion detector characteristic tnrcly/c 1eh classification of temporal noise reduction
sda 9400 micronas 28 preliminary data sheet example of noise measurement input write parameter input read parameter parameter subaddress description nmalg 1dh noise measurement algorithm 1: measurement during vertical blanking period (measure line can be defined by nmline) 0: measurement in the first active line nmline 28h line for noise measurement (only valid for nmalg=1) parameter subaddress description noiseme 32h noise level of the input signal: 0 (no noise), ... , 30 (strong noise) [31 (strong noise or measurement failed)] nmstatus 33h signals a new value for noiseme 1: a new value can be read 0: current noise measurement not finalized (see also i2c bus format on page 64) 123456 7 625 624 623 field1 (a) 313-1 314-2 315-3 316-4 317-5 318-6 319-7 312 311 310 field2 (b) pal h-sync v-sync h-sync v-sync vindel=0 nmline=0 measure nmline=3 vindel=0 nmline=0 measure nmline=3 measure measure nm01 : : : :
sda 9400 micronas 29 preliminary data sheet 6.3.6 motion detection for scan rate conversion the motion detection for scan rate conversion results in a motion value for each pixel. the motion values are stored within the main memory block, read out at the high data rate and used for the scan rate conversion. the motion detection works on luminance data. in case of vdecon>0 or hdecon>0 the motion detection for scan rate conversion is disabled. the diagram below shows the block diagram of the motion detection. separate line, field and frame differences are calculated. the result of the differences are fed to separate look up tables. the result frd of the lutfr (look up table frame) depends on the frame difference and the line difference (ldmax). the result of the lutfi (look up table field) fid1 or fid2 depends on the field difference and the line difference. these three values frd, fid1 and fid2 determine the motion value mval. the final motion value ?motion? is generated by the postprocessing block. it is possible to alternate the behaviour of the motion detection selecting different parameters, which will be described in detail for each block afterwards. block diagram motion detection input write parameter parameter [default value] subaddress description svalli [1] 28h sensitivity of line difference thli2, thli1, thli0 [12, 8, 4] 29h, 2ah threshold of line difference y y frame delay y field delay frame difference field difference line difference field difference line difference in1 in2 in1 in1 in2 in2 lutfr lutfi lutfi add post processing motion movmo in in frd fid1 fid2 mval lddel ldact hpe1off, vleroff hps1off, hpe2off hpexoff, vlexoff thfi0, thfi1, thfi2, thfi3 thfr0, thfr1, thfr2, thfr3 svalli, thlio, thli1, thli2 svalfi, svalfr ammon, frafion to global motion detection md01 frd3 mux swgm thresh frd3 thresh fid3 thrmov thrgm to movie mode and phase detection muxout m a x ldmax
sda 9400 micronas 30 preliminary data sheet the maximum line difference ldmax of the output signals ldact and lddel controls the look up tables lutfr/lutfi in the frame and field difference signal processing path. in this way the sensitivity of the field and frame differences are adapted to the picture contents. the sensitivity of the line difference block can be changed by the svalli parameter. the line difference will be quantised to a two bit value. the thresholds are programmable by the parameters thli2, thli1 and thli0. parameter svalli parameter thli2, thli1, thli0 svalfi [2] 2fh sensitivity of field difference thfi3, thfi2, thfi1, thfi0 [28,18,16,8] 2ah, 2bh, 2ch, 2dh threshold of field difference svalfr [0] 2fh sensitivity of frame difference thfr3, thfr2, thfr1, thfr0 [10,6,4,3] 2dh, 2eh, 2fh threshold of frame difference swgm [1] 31h switch for global motion detection thrgm [8] 31h threshold of frame difference for global motion detection thrmov [8] 30h threshold of field difference for movie mode detection parameter 0 (minimum value) 3 (maximum value) svalli maximum sensitivity line difference minimum sensitivity line difference parameter [default value] subaddress description thli2...63 thli1...thli2-1 thli0...thli1-1 0...thli0-1 3 2 1 0 2 lddel (ldact) md03
sda 9400 micronas 31 preliminary data sheet the motion detection calculates two field difference signals and one frame difference signal. the sensitivity of the field difference can be changed by the parameter svalfi, and the sensitivity of the frame difference can be changed by the parameter svalfr. parameter svalfi and svalfr the output values of the field and frame difference blocks are mapped to 1 bit signals by three look up tables. the thresholds of the look up tables are programmable. thfi3, thfi2, thfi1, thfi0 control both look up tables for the field differences lutfi. thfr3, thfr2, thfr1, thfr0 control the look up table for the frame difference lutfr. the thresholds are selected by the corresponding line difference signals ldact and lddel, respectively as described before. parameter thfi3, thfi2, thfi1, thfi0 parameter thfr3, thfr2, thfr1, thfr0 the output of the look up table lutfi fid1, the output of the lutfr frd, the output of the threshold fid3 and the output of the threshold frd3 are fed to a multiplexer. the output of the multiplexer is fed to the global motion detection block. the multiplexer can be switched using the i2c bus parameter swgm. the output of the threshold fid3 is in addition fed to the movie mode and phase detection block (see also global motion, movie mode and phase detection on page 33). the fid3 and frd3 signal are also one bit signals. both signals are independent of the parameters described up to now. the fid3 signal depends only on the threshold thrmov and the frd3 signal depends only on the threshold thrgm. so it is possible to optimise the movie mode and global parameter 0 (minimum value) 3 (maximum value) svalfi, svalfr maximum sensitivity field/frame difference minimum sensitivity field/frame difference 0...thfi0-1 thfi0...15 0...thfi1-1 thfi1...31 0...thfi2-1 thfi2...31 0...thfi3-1 thfi3...31 0 1 2 3 1 0 2 1 lutfi field difference line difference out thfi0 thfi1 thfi2 thfi3 (i2c bus) 4 5 5 5 md02 0...thfr0-1 thfr0...15 0...thfr1-1 thfr1...15 0...thfr2-1 thfr2...31 0...thfr3-1 thfr3...31 0 1 2 3 1 0 2 1 lutfr frame difference line difference out thfr0 thfr1 thfr2 thfr3 (i2c bus) 4 4 5 5 md02
sda 9400 micronas 32 preliminary data sheet motion detector independent of the settings of the motion detection for scan rate conversion. parameter thmov parameter thrgm parameter swgm the add block combines the outputs of the field and frame differences to a single one bit data stream mval. the combination can be influenced by the parameters ammon and frafion. the output value movmo of the movie mode detection block also controls the value mval when the automatic movie mode detection is activated by setting ammon=1x. with deactivated automatic movie mode detection (msb of ammon=0) frafion determines which differences are switched to the output mval. frafion=0 means that only the frame difference frd is used, frafion=1 supplies all three differences. with activated automatic movie mode detection (msb of ammon=1) and detected camera mode (movmo=0) frafion controls mval as described before. if movie mode is detected (movmo=1) the lsb of ammon controls the output mval instead of frafion. lsb of ammon=0 supplies the frame difference and lsb of ammon=1 sets the output to constant zero. behaviour of add block fid3 1 field difference > thrmov 0otherwise frd3 1 frame difference > thrgm 0otherwise muxout swgm fid3 11 fid1 10 frd3 01 frd 00 ammon movmo frafion mval 0x x 0frd 0x x 1 frd + fid1 + fid2 10 1 xfrd 11 1 x0
sda 9400 micronas 33 preliminary data sheet input write parameter the postprocessing block has the task to delete isolated groups of set motion flags (erosion) and to homogenize the motion areas in horizontal and vertical direction that correspond to a moving object (extension, smearing). the table below shows the several parameters in sequence. they can be switched off (1) or on (0). it is recommended to enable all parameters. input write parameter 6.3.7 global motion, movie mode and phase detection the global motion detection is used to generate a global motion value gmotion. gmotion is a one bit signal and can be read out by the i2c-bus. gmotion equal zero means, the complete picture is still, gmotion equal one means, there is motion in the picture. this value can also be used internal to switch between different scan rate conversion algorithms (see also output sync controller (osc) on page 40). furthermore a movie mode (movmo) and phase (movph) detector is included. movmo and movph are one bit signals and can be read out by i2c-bus or can be used internal to influence the motion detection for scan rate conversion as well as the scan rate conversion itself (see also output sync controller (osc) on page 40). the diagram below shows the block diagram of the global motion, movie mode and phase detection algorithm. 1x 0 0frd 1x 0 1 frd + fid1 + fid2 parameter subaddress description ammon 1ch automatic movie mode for the motion detection for scan rate conversion frafion 1ch frame or field based motion value for scan rate conver- sion parameter subaddress description hpe1off 21h horizontal pixel erosion 1 vleroff 22h vertical line erosion hps1off 23h horizontal pixel smearing 1 hpe2off 24h horizontal pixel erosion 2 hpexoff 25h horizontal pixel extension vlexoff 26h vertical line extension ammon movmo frafion mval
sda 9400 micronas 34 preliminary data sheet block diagram of global motion, movie mode and phase detection the muxout and fid3 values (field difference 1, see also motion detection for scan rate conversion on page 29) are accumulated during each incoming field. after accumulation the value countgm is compared with a threshold th. it is assumed, that the whole picture is moving, if the accumulated value is greater than the threshold (shyst=1). otherwise it will be assumed, that the picture is still (shyst=0). the threshold th itself depends on the actual gmotion value. this is a kind of spatial hysteresis. if the actual gmotion value is zero, then th is equal gmthu. in the other case that gmotion is one, th is equal gmthl. behaviour spatial hysteresis the time hysteresis block generates the final gmotion value. the gmotion value will only changed, if at least the last gmam/gmas fields had the same shyst value. behaviour of time hysteresis shyst 1 count >= th 0 count < th th gmotion 64 * gmthu 0 64 * gmthl 1 gmotion(t) 0 last gmas fields, shyst were 0 fid3 counter hysteresis spatial hysteresis time gmthl gmthu gmas gmam gmotion shyst movie mode and phase detection movmo movph mmthl mmtc movphinv thyon resmov ammon countgm gmd01 counter muxout countmov
sda 9400 micronas 35 preliminary data sheet the countmov value is used in movie mode and phase detector to generate the movmo and the movph signal. movie mode means, that the signal source was a movie (24 hz progressive), which was translated into a (50 hz) interlaced signal. therefore two consecutive fields have the same motion phase. normally field an and field bn belong to the same phase. but it is also possible, depending on the translation process, that field bn-1 and field an belong to the same motion phase. in case of movie mode it is better to switch to an abab mode, therefore the information about movie mode and the movie mode phase is important. this information will be used in the motion detection block for scan rate conversion to switch the motion values to zero or to frame difference (depends on the automatic movie mode parameter) or to force the display raster to ?? in one of the adaptive operation modes (eg. field mixer mode). the phase is necessary for the right order of the fields at the output ( __ mode or baba mode) (see also operation mode generator on page 46). countmov is the result of the accumulation of the fid3 value during one field. this value can be used for the detection of the movie mode. if this value is smaller than a given threshold th (programmable by the parameter mmth), both fields may belong to the same phase. the result of the comparison is stored in cmp (see block diagram of movie mode and phase detection below). the difference of the countmov value of the actual field and the countmov value of the previous field can be used to switch adaptive the threshold for the movie mode detection. the final movmo as well as the movph value is determined by comparison of the results from the last 2*(mmtc+1) cmp values. if thyon = 0 (temporal hysteresis off, i2c bus parameter), the time to switch from camera mode to movie mode and vice versa is the same: 2*(mmtc+1) fields. if thyon = 1 (temporal hysteresis on), the time to switch from camera mode to movie mode differs from the time to switch from movie mode to camera mode. in case thyon = 1 the time to switch from camera to movie mode is 2*(mmtc+1) fields and the time to switch from movie mode to camera is (mmtc+1). so camera mode is preferred. to reset the movie mode detector e.g. after tuner change, the i2c bus parameter resmov exists. if the parameter resmov = 1, the movmo is set to camera mode (movmo=0) and the time hysteresis queue is reset too. resmov = 0 means normal behaviour of the movie mode and movie phase detection block. block diagram of movie mode and phase detection 1 last gmam fields, shyst were 1 gmotion(t-1) otherwise gmotion(t) mmthl countmov cmp detector movmo movph cmp mmtc thyon ammon 1 1 xor movphinv resmov gmd02
sda 9400 micronas 36 preliminary data sheet the movie mode detection block contains a fall back circuit. this fall back circuit can be enabled by the i2c bus parameter ammon. if ammon is set to zero, the fall back counter is disabled. in all other cases the fall back counter is enabled. if the fall back counter is enabled, the failures of the movie mode detector will be counted. so if a certain threshold is reached, the movmo will be forced to camera mode. behaviour cmp block behaviour of detector block input write parameter cmp 1 count >= th 0 count < th th 32 * mmth abs(count(t)-count(t-1)) < 64* mmth 64 * mmth abs(count(t)-count(t-1)) >= 64* mmth movmo 1 movie mode: last 2*(mmtc+1) cmp values were sequence of 0 and 1 or 1 and 0 (e.g. 101010 or 010101) 0 camera mode: last 2*(mmtc+1) cmp values were 1 movph 1 field an and field bn-1 belong to the same phase 0 field an and field bn belong to the same phase parameter subaddress description gmthu 23h global motion detection: upper spatial hysteresis thres- hold gmthl 24h global motion detection: lower spatial hysteresis thres- hold gmas 25h global motion detection: amount of still pictures gmam 26h global motion detection: amount of moving pictures
sda 9400 micronas 37 preliminary data sheet input read parameter 6.4 clock concept input signals mmtc 25h, 26h movie mode detection time constant mmthl 27h movie mode detection threshold movphinv 1: enabled 0: disabled 1dh inversion of the movie phase signal thyon 30h time hysteresis for movie mode detection on/off: 1: on (camera->movie: 2*(mmtc+1); movie->camera: (mmtc+1)) 0: off (camera<->movie: 2*(mmtc+1)) resmov 30h reset of movie mode detection time hysteresis queue 1: reset: movmo=0 (camera mode) 0: no reset parameter subaddress description gmotion 33h global motion flag: 1 - motion, 0 - still movmo 33h movie mode flag: 1 - movie mode, 0 - camera mode movph 33h movie mode phase: field an and field bn-1 belong to the same phase field an and field bn belong to the same phase mdstatus 33h signals a new value for gmotion, movmo, movph or tvmode 1: a new value can be read 0: non of the parameters has changed its value (see also i2c bus format on page 64) signals pin number description clk1 54 system clock 1 input x1/clk2 28 system clock 2 input parameter subaddress description
sda 9400 micronas 38 preliminary data sheet output signals the sda 9400 supports different clock concepts. in chapter 10 (see also application information on page 90) a typical application of the circuit is shown. the front-end clock is connected to clk1 input. the clkout pin is connected to the back-end and the x1/clk2 input is connected to a crystal oscillator. the next figure explains the different clock switches, which may be used for the separate modes (see also page 39, ?ingenious configurations of the hout and vout generator?). clock concept clock concept switching matrix signals pin number description clkout 26 clock output clk11en (19h) clk21en (19h) freqr (1bh) clkout 010clk1 0 0 0 not allowed x 1 1 not allowed 1x0clk2_pll2 x01x1/clk2 clock freqr used in block clk1_pll1 x isc, ifc, ldr, ed, mc, lm, i2c clk2_pll2 0 osc, hdr, ed, mc, lm, ofc x1/clk2 1 osc, hdr, ed, mc, lm, ofc cloco clk1 x1/clk2 pll1 pll2 clk21en clk11en clkout 1 0 0 1 clk1_pll1 clk2_pll2 0 1 freqr
sda 9400 micronas 39 preliminary data sheet input write parameter parameter subaddress description pll1off 1: off 0: on 02h pll 1 on or off pll1ra 09h,0ah pll range, only for test purposes pll2off 1: off 0: on 16h pll 2 on or off pll2ra 19h pll range, only for test purposes clkouton 1: enabled 0: disabled 16h output of system clock
sda 9400 micronas 40 preliminary data sheet 6.5 output sync controller (osc) input signals output signals the output sync controller generates horizontal and vertical synchronization signals for the scan rate converted output signal. the figures below show the block diagram of the osc and the existing parameters. signals pin number description hext 60 horizontal synchronization signal for external synchronization (polarity pro- grammable, i2c bus parameter 14h houtpol, default: high active, exsyn=1) vext 61 vertical synchronization signal for exter- nal synchronization (polarity programma- ble, i2c bus parameter 14h voutpol, default: high active, exsyn=1) signals pin number description hout 60 horizontal synchronization signal (polarity programmable, i2c bus parameter 14h houtpol, default: high active, exsyn=0) vout 61 vertical synchronization signal (polarity programmable, i2c bus parameter 14h voutpol, default: high active, exsyn=0) href 62 horizontal active video output interlaced 18 interlaced signal (can be used for ac cou- pled deflection circuits)
sda 9400 micronas 41 preliminary data sheet block diagram of osc output parameter output write parameter parameter [default value] subaddress description nalop [22] 0bh not active line output defines the number of lines from the v-sync to the first active line of the output frame alpfop [144] 0ch active lines per field output defines the number of active lines per output frame lpfop [156] 0dh lines per frame output defines the number of lines per output frame (only valid for voutfr=1) houtdel [4] 0fh hout delay defines the number of pixels from the h- sync to the first active pixel osc01 hout generator vout generator window generator hout href vout interlaced houtpol, houtfr, applop, houtdel, napop, pplop, exsyn voutpol, intmode, nalop, alpfop, lpfop, exsyn, conv windvon, windvdr, windvsp, windvst, windhon, windhdr, windhsp, windhst hin vin hext vext operation mode generator stopmode, adopmode gmotion, movmo, movph lpfop*4+1 (pplop*2)*clk2 (nalop+1)*2 (alpfop*4) (applop*16)*clk2 (houtdel*4+1)*clk2 hout (napop*4)*clk2 (appl*16)*clk2 vout inpar01
sda 9400 micronas 42 preliminary data sheet the next paragraphs describe the hout and vout generator in more detail. both generators have a so called ?locked-mode? and ?freerunning-mode?. not all combinations of the modi make sense. the table below shows ingenious configurations. ingenious configurations of the hout and vout generator 6.5.1 hout generator the hout generator has two operation modes, which can be selected by the parameter houtfr. the hout signal is active high (houtpol=0) for 64 clock cycles (x1/clk2). in the freerunning- mode the hout signal is generated depending on the pplop parameter. in the locked-mode the hout signal is locked on the incoming h-sync signal hin. in case of external synchronization (exsyn=1), no hout signal is generated. the sda 9400 needs in this case an external h-sync (hext). the polarity of the hext signal as well as of the hout signal is programmable by the parameter houtpol. in case of external synchronization the hout generator has to be set into the locked-mode (see also output sync controller (osc) on page 40). the href signal marks the active part of a line. the figure below shows the timing relation of the hout and the href signal. the distance is programmable by the parameter houtdel. pd means processing delay of the internal data processing (pd=36 x1/clk2 clocks). the length of the active part is determined by the parameter applop. if the number of the active pixels (internal parameter appl, see also horizontal compression on page 19) is smaller than the number of the displayed pixels (e.g. displaying a 4:3 source on a 16:9 screen), a coloured border can be defined using the napop parameter. the border colour is defined by the parameters yborder, napop [0] 0eh not active pixel output defines the number of not active pixels (e.g. coloured border values) applop [45] 10h active pixels per line output defines the number of pixels per line including border pixels appl internal active pixels per line defines the number of active pixels (see also horizontal compression on page 19, applip) pplop [432] 11h, 12h pixel per line output defines the number of pixels bet- ween two consecutive h-syncs (only valid for houtfr=1) mode exsyn houtfr voutfr clk11en clk21en freqr conv ?h-and-v-locked? 0 0 0 1 1 0 by i2c-bus ?h-freerunning-v-locked? 0 1 0 1 0 0 by i2c-bus ?h-and-v-freerunning? 0 1 1 1 0 0 or 1 0 external synchronization 1 0 0 1 0 0 or 1 0 parameter [default value] subaddress description
sda 9400 micronas 43 preliminary data sheet uborder and vborder. to avoid transition artifacts of digital filters the number of active pixels per line (parameter appl) can be symmetrically reduced using the capp parameter. the figure below shows also the internal signal alop, which marks the active pixels of the line. timing diagram of output signals output write parameter parameter subaddress description houtfr 1: freerun 0: locked mode 14h hout generator mode select exsyn 1: on 0: off 14h external synchronization select yborder 17h y border value (four msb of the 8 bit colour) uborder 18h u border value (four msb of the 8 bit colour) vborder 18h v border value (four msb of the 8 bit colour) capp 00: k = 0 01: k = 8 10: k = 16 11: k = 24 10h reducing factor for the active pixels per line value (appl) number of active pixels per line = 16 * appl - 2*k x1/clk2 pplop * 2 tx1/clk2 e.g. 432 * 2 / 27 mhz = 32 s y0 y1 x y2 y3 y4 y5 u0 v0 x u2 v2 u4 v4 ((houtdel + 1) * 4 + pd)* tx1/clk2 ym-2 um-2 ym-1 vm-2 x x m=appl*16 href applop * 16 * tx1/clk2 e.g. 45 * 16 = 720 tx1/clk2 64 * tx1/clk2 hout yout uvout outpar01 yb yb x yb yb y0 y1 ub vb x ub vb u0 v4 ((houtdel + 1 + napop) * 4 + pd)* tx1/clk2 yb ub yb vb x x m=appl*16 yout uvout alop
sda 9400 micronas 44 preliminary data sheet 6.5.2 vout generator the vout generator has two operation modes, which can be selected by the parameter voutfr. the vout signal is active high (voutpol=0) for two output lines. in the freerunning-mode the vout signal is generated depending on the lpfop parameter. in the locked-mode the vout signal is synchronized by the incoming v-sync signal vin (means the internal vin delayed by the parameter opdel, see also input sync controller (isc) on page 11). furthermore the conv parameter defines, how many v-syncs vin have to be suppressed for synchronization. in the freerunning-mode the conv parameter has to be set to conv=0. both the conv and rmode parameter (raster mode 1: progressive, 0: interlaced) determine the scan rate conversion mode. the figure below shows some examples. if conv=000 and rmode=1, then for each incoming v-sync signal vin an outgoing v-sync signal vout has to be generated (e.g. 50 hz interlaced to 50 hz progressive scan rate conversion). if conv=000 and rmode=0, then during one incoming v-sync signal, two vout pulses have to be generated (e.g. 50 hz interlaced to 100 hz interlaced scan rate conversion). if conv=111 and rmode=1, then during two incoming vin signals, three vout pulses have to be generated. that means every second vin is not used to synchronize the output v-sync raster on the incoming v-sync raster. if conv=110 and rmode=1, then during five incoming vin signals, seven vout pulses have to be generated. examples for vout generation depending on parameter conv and rmode output write parameter: conv, rmode conv rmode = 0 rmode = 1 factor mode input syncs output syncs output syncs e.g. 000 1 2 1 1.0 50->100 hz interlaced, 50-> 50 hz progressive 001 8 18 9 1.125 (9/8) 010 7 16 8 1.14 (8/7) 011 6 14 7 1.16 (7/6) 60->140 hz interlaced, 60->70 hz progressive 100 5 12 6 1.2 (6/5) 50->120 interlaced, 50->60 hz progressive 101 4 10 5 1.25 (5/4) 60->150 hz interlaced, 60->75 hz progressive vin vout (conv=111) vout (conv=110) rmode=1 vout (conv=000) rmode=0 vout (conv=000)
sda 9400 micronas 45 preliminary data sheet in case of external synchronization (exsyn=1), no vout signal is generated. the sda 9400 needs in this case an external v-sync (vext). the polarity of the vext signal as well as of the vout signal is programmable by the parameter voutpol. in case of external synchronization the vout generator has to be set to the locked-mode (see also output sync controller (osc) on page 40). the vout signal has a delay of two clkout clocks to the hout signal or in case of interlaced a delay of a half line plus two clkout clocks. output write parameter switching from h-and-v-freerunning to h-and-v-locked mode in h-and-v-freerunning mode, generally, the phase of the generated synchronization raster has no correlation to the input raster. a hard switch from the h-and-v-freerunning mode to the h-and-v- locked mode therefore would cause visible synchronization artefacts. to avoid these problems the sda 9400 enlarges the line and the field lengths of the output sync signals hout and vout in a defined procedure to enable an unvisible synchronization of the freerunning output to the input. for vertical synchronization the maximum synchronization time is 260 ms for interlaced and 520 ms for progressive display modes. horizontal synchronization is performed in a maximum time of 50 ms. to get the best performance it is recommended to change at first the vertical and after the mentioned delay times the horizontal mode from free running to locked. 110 5 14 7 1.4 (7/5) 50-> 140 hz interlaced, 50->70 hz progressive 111 2 6 3 1.5 (3/2) 50->150 hz interlaced 50->75 hz progressive parameter subaddress description voutfr 1: freerun 0: locked mode 14h vout generator mode select exsyn 1: on 0: off 14h external synchronization select conv 15h conv defines the scan rate conversion mode rmode 1: progressive 0: interlaced 14h raster mode conv rmode = 0 rmode = 1 factor mode
sda 9400 micronas 46 preliminary data sheet 6.5.3 operation mode generator the vout generator determines the vout signal. for proper operation of the vout generator information about the raster sequence is necessary. the parameter stopmode (static operation mode) and the parameter adopmode (adaptive operation mode) define the raster sequence and the scan rate conversion algorithm. the figure below explains the used wording for the following explanations. explanations of field and display raster the interlaced input signal (e.g. 50 hz pal or 60 hz ntsc) is composed of a field a (odd lines) and a field b (even lines). a n - input signal, field a at time n, b n - input signal, field b at time n the field information describes the picture content. the output signal, which could contain different picture contents (e.g. field a, field b ) can be displayed with the display raster or ? . (a n , ) - output signal, field a at time n, displayed as raster field b field a odd lines even lines frame/field frame content of picture display raster tv display raster display raster display raster ? tube, display raster odd lines even lines fieldras01
sda 9400 micronas 47 preliminary data sheet (a n , ? ) - output signal, field a at time n, displayed as raster ? ((a*) n , ? ) - output signal, field a raster interpolated into field b at time n, displayed as raster ? (a n b n-1 , + ?=?= output signal, frame ab at time n, progressive the table below describes the different scan rate conversion algorithms and the corresponding raster sequences (see also principles of scan rate conversion on page 55). the delay between the input field and the corresponding output fields depends on the opdel parameter and the default value for the delay is an half input field. the interlaced signal can be used for ac-coupled deflections. depending on the parameter intmode the value of this signal will be generated. the table below shows also the definition of this signal. explanation of operation mode timing static operation modes (only valid for adopmode=0) input field a input field b stopmode scan rate conversion algorithm output field a n phase 0 output field b n phase 1 output field c n phase 2/0 output field d n phase 3/1 rmode 0000 abab mode i interlaced b n-1 , intmode(3) a n , intmode(0) b n , intmode(1) a n , intmode(2) 0 0001 aa*b*b mode i interlaced (a*) n , intmode(3) a n , intmode(0) b n , intmode(1) (b*) n , intmode(2) 0 0010 aabb mode i interlaced a n , intmode(0) a n , intmode(0) b n , intmode(1) b n , intmode(1) 0 0011 micronas soft mix i (motion adaptive mode interlaced) b n-1 , or (a*) n , intmode(3) a n , intmode(0) b n , intmode(1) a n , or (b*) n , intmode(2) 0 0100 multipicture mode i a n , intmode(0) a n , intmode(0) a n , intmode(0) a n , intmode(0) 0 osc02 a n b n time input fields a n phase 0 b n phase 1 c n phase 2/0 d n phase 3/1 output fields b n-1 , a n fields available in the internal field stores a n-1 , b n-1 a n , b n opdel lines
sda 9400 micronas 48 preliminary data sheet 0101 multipicture mode ii b n-1 , intmode(1) b n-1 , intmode(1) b n , intmode(1) b n , intmode(1) 0 0110 aaaa mode a n , intmode(0) a n , intmode(0) a n , intmode(0) a n , intmode(0) 0 0111 bbbb mode b n-1 , intmode(0) b n-1 , intmode(0) b n , intmode(0) b n , intmode(0) 0 1000 abab mode ii interlaced a n , intmode(0) b n-1 , intmode(1) a n , intmode(2) b n , intmode(3) 0 1001 aa*b*b mode ii interlaced (b*) n-1 , intmode(2) b n-1 , intmode(1) a n , intmode(0) (a*) n , intmode(3) 0 1010 aabb mode ii interlaced b n-1 , intmode(1) b n-1 , intmode(1) a n , intmode(0) a n , intmode(0) 0 1011 micronas soft mix ii (motion adaptive mode interlaced) b n-1 , intmode(1) a n , intmode(0) b n , or (a*) n , intmode(3) a n , or (b*) n , intmode(2) 0 1100 micronas soft mix iii (motion adaptive mode interlaced) a n , intmode(0) b n-1 , or (a*) n , intmode(3) a n , or (b*) n , intmode(2) b n , intmode(1) 0 11xxnot definedxxxx0 0000, 0100, 0110 ab mode progres- sive (a n b n-1 , ? ) (a n b n , ? ) 1 0001 aa* mode i pro- gressive (a n a* n , ? ) (b* n b n , ? ) 1 0010 not defined xxxx1 0011 micronas soft mix (motion adaptive mode progressive) (a n b n-1 or a n a* n ? ? ) (a n b n or b* n b n , ? ) 1 0101 aa* mode ii pro- gressive (a n a* n , ? ) (a n a* n , ? ) 1 0111 b*b mode progres- sive (b n-1 b* n-1 , ? ) (b n b* n , ? ) 1 1000 test mode (motion adaptive mode interlaced, dl) (a n b n-1 or a n a* n ?? ? ) (a n b n or b* n b n ?? ? ) 1 input field a input field b stopmode scan rate conversion algorithm output field a n phase 0 output field b n phase 1 output field c n phase 2/0 output field d n phase 3/1 rmode
sda 9400 micronas 49 preliminary data sheet for stopmode=0011 (micronas soft mix i) the high performance motion detector is used to switch motion adaptive pixel by pixel between different algorithms. this scan rate conversion method results in a high performance line flicker reduction (see also principles of scan rate conversion on page 55). the table below shows all possible display raster sequences for the different static operation modes and the lines per field value between two consecutive output v-syncs. it is assumed, that in case of freerunning-mode lpfop=156 and in the locked mode the number of lines of the incoming field is 312.5. display raster sequence for rmode=1 (progressive) display raster sequence for rmode=0 (interlaced) all static operation modes can be influenced by the i2c bus parameters fixshr, medon, csmoff and psmoff. some fields are raster interpolated. two raster interpolation methods are implemented, which can be switched using the i2c parameter medon. 1xxx not defined xxxx1 display raster sequence 1. to 2. 2. to 3. (1.) ? 625 625 display raster sequence 1. to 2. 2. to 3. 3. to 4. 4. to 5.(1.) 312 313 312 313 312.5 312.5 312.5 312.5 313 312 313 312 312.5 312.5 312.5 312.5 312 312.5 313 312.5 313 312.5 312 312.5 ?? (test mode only) 625,5 624,5 625,5 624,5 input field a input field b stopmode scan rate conversion algorithm output field a n phase 0 output field b n phase 1 output field c n phase 2/0 output field d n phase 3/1 rmode
sda 9400 micronas 50 preliminary data sheet output write parameter: medon in addition a temporal mixing of the different fields can be switched on using the parameters fixshr, csmoff, psmoff. temporal mixing may be used for better line flicker reduction performance. output write parameter: csmoff, psmoff, fixshr the adaptive operation modes (adopmode) define a dynamic switch between different static operation modes controlled by several internal signals. the start point of all modes is the actual chosen stopmode as described before. the tables below shows the different adaptive operation modes. the internal used control signals are gmotion, movmo and movph (see also global motion, movie mode and phase detection on page 33). furthermore the internal control signal vtseq exists. in case of parameter vcrmode=1, vtseq is still zero. if vcrmode=0, vtseq can be equal one (see also input sync controller (isc) on page 11). in this cases the scan rate conversion is forced to a simple field based scan rate conversion algorithm. all internal control signals gmotion, movmo and movph are also readable by the i2c-bus interface. adaptive operation modes (rmode = 0 (interlaced)): medon raster interpolation method 0 linear filter 1 median filter csmoff psmoff fixshr x x 1 fixed temporal mixing on, independent of motion detec- tor for scan rate conversion 0 0 0 temporal mixing on for all static operation modes, depending on motion detection for scan rate conversion 0 1 0 temporal mixing on for all static operation modes, but only raster interpolated fields, depending on motion detection for scan rate conversion 1 0 0 temporal mixing on for all static operation modes, but only for not raster interpolated fields, depending on motion detection for scan rate conversion 1 1 0 temporal mixing off
sda 9400 micronas 51 preliminary data sheet adopmode: off adopmode: still picture mode adopmode: field mixer mode i adopmode: field mixer mode ii adopmode: movie mode i adopmode=000 movmo movph gmotion vtseq no adaptive mode, operation defined by stopmode xxxx adopmode=001 movmo movph gmotion vtseq abab mode i interlaced xx00 stopmode x x 1 0 aabb mode i interlaced xxx1 adopmode=010 movmo movph gmotion vtseq stopmode x x 0 0 aabb mode i interlaced xx10 aabb mode i interlaced xxx1 adopmode=011 movmo movph gmotion vtseq stopmode x x 0 0 aabb mode i interlaced xx10 aa*b*b mode i interlaced xxx1 adopmode=100 movmo movph gmotion vtseq stopmode 0 x x 0 abab mode i interlaced 10x0 abab mode ii interlaced 11x0
sda 9400 micronas 52 preliminary data sheet adopmode: movie mode ii adopmode: field mixer mode i and movie mode adopmode: field mixer mode ii and movie mode aa*b*b mode i interlaced xxx1 adopmode=101 movmo movph gmotion vtseq stopmode 0 x x 0 abab mode i interlaced 10x0 abab mode ii interlaced 11x0 aabb mode i interlaced xxx1 adopmode=110 movmo movph gmotion vtseq stopmode 0 x 0 0 aabb mode i interlaced 0x10 abab mode i interlaced 10x0 abab mode ii interlaced 11x0 aabb mode i interlaced xxx1 adopmode=111 movmo movph gmotion vtseq stopmode 0 x 0 0 aabb mode i interlaced 0x10 abab mode i interlaced 10x0 abab mode ii interlaced 11x0 aa*b*b mode i interlaced xxx1 adopmode=100 movmo movph gmotion vtseq
sda 9400 micronas 53 preliminary data sheet basic adaptive operation mode (rmode = 1 (progressive)): adopmode: off adopmode: vcrmode off example for explanation of the adaptive operation modes: adopmode=2: field mixer mode i in this case the scan rate conversion algorithm is only controlled by the signal gmotion. if gmotion=0, the scan rate algorithm is defined by the parameter stopmode (e.g. micronas field mixer algorithm). if gmotion=1 the scan rate conversion algorithm is changed to the simple aabb mode i interlaced. the behaviour in this case is like the micronas field mixer circuit sda9270. recommended operation mode combinations adopmode=000 movmo movph gmotion vtseq no adaptive mode, operation defined by stopmode xxxx adopmode=001 movmo movph gmotion vtseq stopmode x x x 0 aa* mode i pro- gressive xxx1 mo de stopmode adop mode csmoff psmoff medon fixshr comment 1 0011 softmix i 0001100corres ponds to former sda 9272 (vip), 2 0011 softmix i 0101100mode 1 plus global fall back mode aabb activa- ted 3 0011 softmix i 1101100mode 2 plus movie mode fall back abab activated 4 1011 softmix ii 0000000corres ponds to former sda 9270 (fieldmixer) 5 1011 softmix ii 0100000mode 4 plus global fall back mode activated 6 1011 softmix ii 1100000mode 5 plus movie mode fall back abab activated
sda 9400 micronas 54 preliminary data sheet the stopmode parameter has in case of external synchronization a different meaning (exsyn=1). the stopmode parameter defines, which input display raster the osc block expects and which output pictures the sda 9400 generates. in case of interlaced signals the field information is also necessary. the sda 9400 will detect the information itself. if the vext signal has a rising edge in the first half of the line period a field a is detected, otherwise a field b. the sda 9400 recognizes only the rising edge of the vext and the hext signal. therefore the length of the external signals are not relevant. field detection by external synchronization static operation modes for external synchronization if stopmode=0, then the sda 9400 expects an external interlaced signal with the raster sequence ?? and the sda 9400 generates an output picture sequence abab. output write parameter stopmode scan rate conversion algorithm output field phase 0 output field phase 1 rmode 0000 ab mode interlaced a n b n 0 0100 aa mode a n a n 0 0101 bb mode b n b n 0 0000 ab mode progressive ab n ab n 1 parameter subaddress description intmode 13h, 14h free programmable interlaced signal for ac-cou- pled deflection stages stopmode 12h static operation modes adopmode 12h adaptive operation modes medon 17h raster interpolation filter method fixshr 17h fixed temporal mixing csmoff 19h temporal mixing psmoff 19h temporal mixing vext hext vext field a field b hvext
sda 9400 micronas 55 preliminary data sheet 6.5.4 principles of scan rate conversion the scan rate conversion algorithm concept is based on the assumption that the video input signal can be in camera mode (two consecutive fields belong not to the same motion phase) or movie mode (means two consecutive fields belong to the same motion phase). the camera mode material can be further separated. the separation is based on the motion range of the picture content, which is displayed. for the different source materials optimised scan rate conversion methods exist. movie mode material should be displayed in abab or baba mode depending on the movie mode phase. for camera mode material the optimised scan rate conversion method depends on the picture content. that means for still areas the abab scan rate conversion method is optimal (best line flicker reduction) and for moving areas or objects aabb scan rate conversion method is well suited. normally camera material can contain both types of areas or objects. that?s why a high performance 3-d motion detector is included, which analyzes the picture content and assigns each pixel to a still or moving area (object). depending on the assignment of the 3-d motion detector different optimised scan rate conversion methods will be used. due to the fact that the switch between these methods is soft, the algorithm is called soft switch. depending on the motion range, which can be individually defined by the thresholds of the global motion detector block, the soft mix method may be switched to the scan rate conversion method aabb. this display method is best for camera mode material, if the motion range is as high that line flickering is not visible any more. the figure below shows the algorithm concept in more detail. the global motion detector can be used to separate the whole motion range in two areas. the separation point depends on the parameter setting and can be changed individually. if the motion range exceeds the separation point, the aabb method is applied. otherwise the e.g. soft mix method is used as the scan rate conversion method. in case of movie mode abab or baba is applied. the switching is automatically done if one of the adaptive modes (i2c bus parameter adopmode) is used.
sda 9400 micronas 56 preliminary data sheet principles of scan rate conversion exoalgo stopmode e.g. soft mix ii (1011) aabb (0010) abab (0000) or baba (1000) gmotion = 1 (motion) movmo = 0 (camera) movph = x gmotion = 0 (still) movmo = 0 (camera) movph = x gmotion = x movmo = 1 (movie) movph = x abab (0000) a'b'a"b" field based switch pixel based switch motion range aabb soft mix threshold defined by global motion detector
sda 9400 micronas 57 preliminary data sheet 6.5.5 window generator the figures below show the functionality of the horizontal and/or vertical window function. the actual tv display can be overwritten with a constant value (defined by yborder, uborder, vborder), which is called ?closing? or the constant value can be overwritten with the actual tv signal, which is called ?opening?. for the generation some parameters exist, which will be explained in more detail afterwards. examples for window feature the feature can be enabled by the parameter windhon/windvon. the parameter windhst/ windvst defines the status of the window (opened or closed). closed means, that only a constant value is displayed, opened means, that the full tv is displayed. the parameter windhdr/ windvdr defines, what can be done with the window (open the window, close the window). output write parameter: windhst/windvst and windhdr/windvdr with each enabling of the window function by the windhon/windvon parameter, the status of the window will be as defined by the table above, that means the windhst/windvst parameter is only once interpreted after enabling the window function. to change afterwards the status from ?window is close? to ?window is open? or vice versa only the windhdr/windvdr has to be windhst/ windvst description windhdr/ windvdr description 0 window is closed 0 open the window 0 window is closed 1 window remains closed 1 window is opened 0 window remains open 1 window is opened 1 close the window window
sda 9400 micronas 58 preliminary data sheet toggled. if for example the status windhst/windvst=0 and the windhdr/windvdr=0 the window is closed and will be open after enabling the feature by setting the parameter windhon/ windvon=1. to close the window only the parameter windhdr/windvdr has to be set to 1. again to open the window windhdr/windvdr has to be set to 0. for example: after switching on the tv set, the customer should see the window closed and afterwards the window should be opened. therefore the windhst/windvst has to be set to ?0?, the windhdr/ windvdr has to be set to ?1? and the windhon/windvon has to be set to ?1?. so the customer will see first a screen with a colour defined by the i2c parameters yborder, uborder and vborder. then the windhdr/windvdr has to be set to ?0?, that means the window will be open and the customer will see the chosen tv channel. the speed of closing or opening the window can be defined by the parameter windhsp/ windvsp. the tables below explain the using of these parameters. output write parameter: windhsp distance: number of pixels in system clocks x1/clk2 between two output h-syncs time to close = time(field) * number of active pixels / (distance/512) e.g. time to close = 10 ms * 720 / (864/512) = 4,26 s time to close = time(field) * number of active pixels / (pplop/128) output write parameter: windvsp windhsp freerun mode locked mode time to close/ open (e.g. 720 active pixel, 10ms per output field) 00 pplop/256 distance/512 ~4s 01 pplop/128 distance/256 ~2s 10 pplop/64 distance/128 ~1s 11 pplop/32 distance/64 ~0.5s windvsp freerun mode locked mode time to close/ open (e.g. 576 active lines, 10ms per output field) 00 lpfop/128 lpfip/256 ~5s 01 lpfop/64 lpfip/128 ~2s 10 lpfop/32 lpfip/64 ~1s 11 lpfop/16 lpfip/32 ~0.5s
sda 9400 micronas 59 preliminary data sheet lpfip: lines per field of the input signal - amount of lines between two input v-syncs time to close = time(field(interlaced)/frame(progressive)) * number of active lines / (lpfip/256) e.g. time to close = 10 ms * 576 / (312/256) = 4.7 s time to close = time(field) * number of active lines / (lpfop/128) output write parameter 6.6 output format conversion (ofc) output signals the sda 9400 supports at the output side only the sample frequency relations of y : (b-y) : (r-y): parameter subaddress description windvon 1: on 0: off 15h vertical window feature on or off windvdr 1: close window 0: open window 15h direction of the vertical window feature windvst 1: window is opened 0: window is closed 15h status of the vertical window feature after enabling the window feature windvsp 15h speed of the vertical window feature windhon 1: on 0: off 16h horizontal window feature on or off windhdr 1: close window 0: open window 16h direction of the horizontal window feature windhst 1: window is opened 0: window is closed 16h status of the horizontal window feature after enabling the window feature windhsp 16h speed of the horizontal window feature flashon 1: on 0: off 17h flash of the tv signal (after each output v-sync the tv signal or the constant background value defined by yborder, uborder, vborder is displayed) signals pin number description yout0...7 7, 6, 5, 4, 3, 1, 64, 63 luminance output uvout0...7 17, 16, 15, 14, 13, 12, 11, 10 chrominance output
sda 9400 micronas 60 preliminary data sheet 4:2:2. the representation of the samples of the chrominance signal is programmable as positive dual code (unsigned, parameter twoout=0) or two's complement code (twoout=1, see also i2c bus format on page 64, i2c bus parameter 17h). output data format x ab: x: signal component a: sample number b: bit number 6.7 high data rate processing (hdr) the output signal can be vertically expanded. the expansion as well as the different scan rate conversion algorithms are processed in the hdr block. for the vertical expansion line memories are used. if the operation frequency x1/clk2 is higher than 27 mhz plus 10%, the line memories will not work correctly any more. in this case only simple processing will be possible. simple processing means, that the vertical expansion must be disabled. to force simple processing the parameter freqr is used. furthermore all static operation modes are disabled, which needs the interpolation into another raster position like micronas soft mix mode. output write parameter: freqr data pin 4:2:2 parallel yout7 y 07 y 17 yout6 y 06 y 16 yout5 y 05 y 15 yout4 y 04 y 14 yout3 y 03 y 13 yout2 y 02 y 12 yout1 y 01 y 11 yout0 y 00 y 10 uvout7 u 07 v 07 uvout6 u 06 v 06 uvout5 u 05 v 05 uvout4 u 04 v 04 uvout3 u 03 v 03 uvout2 u 02 v 02 uvout1 u 01 v 01 uvout0 u 00 v 00 freqr x1/clk2 vertical expansion 0 <= 27 mhz + 10% depends on verint
sda 9400 micronas 61 preliminary data sheet the table below defines the internal expansion factor zoom depending on the rmode, freqr and verint parameter. output write parameter: verint the reachable expansion factors are listed in the table below in case of vdecon=0 and vdecon=2 (vertical compression of the input signal with factor 1.0 and 1.5). examples of reachable expansion factors 1 > 27 mhz + 10% off freqr verint rmode zoom 0 i2c-bus parameter 0 2*(verint+1) 0 i2c-bus parameter 1(verint+1) 1x0128 1x164 100/120 hz interlaced rmode=0 conv=0 50/60 hz progressive rmode=1 conv=0 real vertical expansion factor real vertical expansion factor verint zoom zoom vdecon=0 vdecon=2 63 128 64 1.00 0.75 62 126 63 1.02 0.76 61 124 62 1.03 0.77 60 122 61 1.05 0.79 59 120 60 1.07 0.80 58 118 59 1.08 0.81 57 116 58 1.10 0.83 56 114 57 1.12 0.84 55 112 56 1.14 0.86 54 110 55 1.16 0.87 53 108 54 1.19 0.89 52 106 53 1.21 0.91 51 104 52 1.23 0.92 50 102 51 1.25 0.94 49 100 50 1.28 0.96 48 98 49 1.31 0.98 47 96 48 1.33 1.00 freqr x1/clk2 vertical expansion
sda 9400 micronas 62 preliminary data sheet 46 94 47 1.36 1.02 45 92 46 1.39 1.04 44 90 45 1.42 1.07 43 88 44 1.45 1.09 42 86 43 1.49 1.12 41 84 42 1.52 1.14 40 82 41 1.56 1.17 39 80 40 1.60 1.20 38 78 39 1.64 1.23 37 76 38 1.68 1.26 36 74 37 1.73 1.30 35 72 36 1.78 1.33 34 70 35 1.83 1.37 33 68 34 1.88 1.41 32 66 33 1.94 1.45 31 64 32 2.00 1.50 30 62 31 2.06 1.55 29 60 30 2.13 1.60 28 58 29 2.21 1.66 27 56 28 2.29 1.71 26 54 27 2.37 1.78 25 52 26 2.46 1.85 24 50 25 2.56 1.92 23 48 24 2.67 2.00 22 46 23 2.78 2.09 21 44 22 2.91 2.18 20 42 21 3.05 2.29 19 40 20 3.20 2.40 18 38 19 3.37 2.53 17 36 18 3.56 2.67 16 34 17 3.76 2.82 15 32 16 4.00 3.00 14 30 15 4.27 3.20 13 28 14 4.57 3.43 12 26 13 4.92 3.69 11 24 12 5.33 4.00 10 22 11 5.82 4.36 920106.404.80 8 18 9 7.11 5.33 7 16 8 8.00 6.00 6 14 7 9.14 6.86 5 12 6 10.67 8.00 4 10 5 12.80 9.60 3 8 4 16.00 12.00 100/120 hz interlaced rmode=0 conv=0 50/60 hz progressive rmode=1 conv=0 real vertical expansion factor real vertical expansion factor verint zoom zoom vdecon=0 vdecon=2
sda 9400 micronas 63 preliminary data sheet the parameter vpan can be used to select the start line of the expansion. to expand the upper part of the incoming signal with the factor 2.0, vpan should be set to zero. to expand the lower part, vpan should be equal to 144. that means in case of vpan=0 the first used line is line 1 and in case of vpan=144 the first used line is line 144. dependent on the parameter verint a certain number of input lines of the input field is required. therefore not all vpan values are allowed. the formula below can be used to calculate the maximum allowed vpan value depending on the chosen verint value. calculation of maximum vpan value floor symbol means: take only integer part of x output write parameter 2 6 3 21.33 16.00 1 4 2 32.00 24.00 0 2 1 64.00 48.00 parameter subaddress description verint 13h vertical expansion factor vpan 1ah vertical adjustment of the output picture freqr 1bh frequency range select 100/120 hz interlaced rmode=0 conv=0 50/60 hz progressive rmode=1 conv=0 real vertical expansion factor real vertical expansion factor verint zoom zoom vdecon=0 vdecon=2 vpanmax 2 alpfop 1 verint 1 + ? 64 ----------------------------------- - ? = x
sda 9400 micronas 64 preliminary data sheet 6.8 i2c bus 6.8.1 i2c bus slave address write adress: bch read adress: bdh 6.8.2 i2c bus format the sda 9400 i 2 c bus interface acts as a slave receiver and a slave transmitter and provides two different access modes (write, read). all modes run with a subaddress auto increment. the interface supports the normal 100 khz transmission speed as well as the high speed 400 khz transmission. write: s: start condition a: acknowledge p: stop condition na: not acknowledge read: the transmitted data are internally stored in registers. the master has to write a don?t care byte to the subaddress ffh (store command) to make the register values available for the sda 9400. to have a defined time step, where the data will be available, the data are made valid with the incoming v-sync vin or with the next opstart pulse, which is an internal signal and indicates the start of a new output cycle. the subaddresses, where the data are made valid with the vin signal are indicated in the overview of the subaddresses with ?vi?, where the data are made valid with the opstart are indicated with ?os?. the i2c parameter vistatus and osstatus (subaddress 33h) reflect the state of the register values. if these bits are read as ?0?, then the store command was sent, but the data aren?t made available yet. if these bits are ?1? then the data were made valid and a new write or read cycle can start. the bits vistatus and osstatus may be checked before writing or reading new data, otherwise data can be lost by overwriting. furthermore the bits nmstatus (status of noise measurement: noiseme) and mdstatus (status of motion detection parameters: gmotion, movmo, movph, tvmode) exist. nmstatus signalizes a new value for noiseme. so if nmstatus is read as ?0? the current noise measurement has not been finalized. if the nmstatus is read as ?1? a new noise measurement 10111100 10111101 s10111100a subaddress a data byte a ***** ap s10111100a subaddress as10111101a data byte a data byte na p
sda 9400 micronas 65 preliminary data sheet value can be read. mdstatus signalizes at least a change of one of the parameters: gmotion, movmo, movph, tvmode. so if mdstatus is read as ?0? none of the parameters has changed its value. if the mdstatus is read as ?1? at least one of the parameters has changed its value. after switching on the ic, all bits of the sda 9400 are set to defined states. particularly : r/w: r - read register; w - write register; r/w - read and write register; take over: vi - take over with vin; os- take over with opstart reading the ?read only? register 32h must be followed by reading the ?read only? register 33h. subaddress default value r/w take over subaddress default value r/w take over 00 11h w vi 1b 00h w vi 01 00h w vi 1c 01h w vi 02 50h w vi 1d 0bh w vi 03 90h w vi 1e ffh w vi 04 00h w vi 1f 00h w vi 05 b4h w vi 20 ffh w vi 06 aah w vi 21 02h w vi 07 00h w vi 22 02h w vi 08 00h w vi 23 88h w vi 09 00h w vi 24 86h w vi 0a 00h w vi 25 ech w vi 0b 16h w os 26 84h w vi 0c 90h w os 27 18h w vi 0d 9ch w os 28 22h w vi 0e 00h w os 29 31h w vi 0f 04h w os 2a 09h w vi 10 b4h w os 2b c9h w vi 11 b0h w os 2c 42h w vi 12 d8h w os 2d 14h w vi 13 3fh w os 2e 64h w vi 14 00h w os 2f 38h w vi 15 00h w os 30 90 w vi 16 04h w os 31 50 w vi 17 14h w os 32 r 18 88h w os 33 r 19 0ch w os 34...fe not used 1a 00h w os ff w
sda 9400 micronas 66 preliminary data sheet 6.8.3 i2c bus commands subadd. (hex.) data byte d7 d6 d5 d4 d3 d2 d1 d0 00 format1 isc/ifc format0 isc/ifc fieinv isc vcrmode isc pimode isc napipph1 isc napipph0 isc twoin isc/ifc 01 vindel5 isc vindel4 isc vindel3 isc vindel2 isc vindel1 isc vindel0 isc vinpol isc hinpol isc 02 nalip5 isc nalip4 isc nalip3 isc nalip2 isc nalip1 isc nalip0 isc pll1off pll1 refresh mc 03 alpfip7 isc alpfip6 isc alpfip5 isc alpfip4 isc alpfip3 isc alpfip2 isc alpfip1 isc alpfip0 isc 04 napipdl7 isc napipdl6 isc napipdl5 isc napipdl4 isc napipdl3 isc napipdl2 isc napipdl1 isc napipdl0 isc 05 applip5 isc applip4 isc applip3 isc applip2 isc applip1 isc applip0 isc xx 06 opdel7 isc opdel6 isc opdel5 isc opdel4 isc opdel3 isc opdel2 isc opdel1 isc opdel0 isc 07 verwidth7 isc verwidth6 isc verwidth5 isc verwidt4 isc verwidth3 isc verwidth2 isc verwidth1 isc verwidth0 isc 08 verpos7 isc verpos6 isc verpos5 isc verpos4 isc verpos3 isc verpos2 isc verpos1 isc verpos0 isc 09 horwidth5 isc horwidth4 isc horwidth3 isc horwidth2 isc horwidth1 isc horwidt0 isc pll1ra1 pll1 pll1ra0 pll1 0a horpos5 isc horpos4 isc horpos3 isc horpos2 isc horpos1 isc horpos0 isc pll1ra3 pll1 pll1ra2 pll1 0b nalop7 osc nalop6 osc nalop5 osc nalop4 osc nalop3 osc nalop2 osc nalop1 osc nalop0 osc 0c alpfop7 osc alpfop6 osc alpfop5 osc alpfop4 osc alpfop3 osc alpfop2 osc alpfop1 osc alpfop0 osc 0d lpfop7 osc lpfop6 osc lpfop5 osc lpfop4 osc lpfop3 osc lpfop2 osc lpfop1 osc lpfop0 osc 0e napop7 osc napop6 osc napop5 osc napop4 osc napop3 osc napop2 osc napop1 osc napop0 osc 0f houtdel7 osc houtdel6 osc houtdel5 osc houtdel4 osc houtdel3 osc houtdel2 osc houtdel1 osc houtdel0 osc 10 applop5 osc applop4 osc applop3 osc applop2 osc applop1 osc applop0 osc capp1 osc capp0 osc 11 pplop7 osc pplop6 osc pplop5 osc pplop4 osc pplop3 osc pplop2 osc pplop1 osc pplop0 osc 12 pplop8 osc stopmode3 osc stopmode2 osc stopmode1 osc stopmode0 osc adopmod2 osc adopmod1 osc adopmod0 osc 13 intmode3 osc intmode2 osc verint5 osc verint4 osc verint3 osc verint2 osc verint1 osc verint0 osc 14 intmode1 osc intmode0 osc exsyn osc rmode osc voutfr osc houtfr osc voutpol osc houtpol osc 15 windvon osc windvdr osc windvst osc windvsp1 osc windvsp0 osc conv2 osc conv1 osc conv0 osc
sda 9400 micronas 67 preliminary data sheet 16 windhon osc windhdr osc windhst osc windhsp1 osc windhsp0 osc clkouton pll2 pll2off pll2 x 17 yborder3 ofc/ldr yborder2 ofc/ldr yborder1 ofc/ldr yborder0 ofc/ldr flashon ofc twoout ofc fixshr hdr medon hdr 18 uborder3 ofc/ldr uborder2 ofc/ldr uborder1 ofc/ldr uborder0 ofc/ldr vborder3 ofc/ldr vborder2 ofc/ldr vborder1 ofc/ldr vborder0 ofc/ldr 19 pll2ra3 pll2 pll2ra2 pll2 pll2ra1 pll2 pll2ra0 pll2 clk21en pll2 clk11en pll2 csmoff hdr psmoff hdr 1a vpan7 mc vpan6 mc vpan5 mc vpan4 mc vpan3 mc vpan2 mc vpan1 mc vpan0 mc 1b multipic1 ldr/isc multipic0 ldr/isc picpos3 ldr/mc picpos2 ldr/mc picpos1 ldr/mc picpos0 ldr/mc freeze mc freqr mc/osc/hd 1c vdecon2 ldr vdecon1 ldr vdecon0 ldr hdecon1 ldr/isc hdecon0 ldr/isc ammon1 ldr ammon0 ldr frafion ldr 1d nron ldr/mc snron ldr vcsnron ldr hcsnron ldr dtnron ldr movphinv ldr tnrsel ldr nmalg ldr 1e tnrcly3 ldr tnrcly2 ldr tnrcly1 ldr tnrcly0 ldr tnrclc3 ldr tnrclc2 ldr tnrclc1 ldr tnrclc0 ldr 1f tnrkoy3 ldr tnrkoy2 ldr tnrkoy1 ldr tnrkoy0 ldr tnrkoc3 ldr tnrkoc2 ldr tnrkoc1 ldr tnrkoc0 ldr 20 tnrvay3 ldr tnrvay2 ldr tnrvay1 ldr tnrvay0 ldr tnrvac3 ldr tnrvac2 ldr tnrvac1 ldr tnrvac0 ldr 21 tnrhoy5 ldr tnrhoy4 ldr tnrhoy3 ldr tnrhoy2 ldr tnrhoy1 ldr tnrhoy0 ldr tnrfiy ldr hpe1off ldr 22 tnrhoc5 ldr tnrhoc4 ldr tnrhoc3 ldr tnrhoc2 ldr tnrhoc1 ldr tnrhoc0 ldr tnrfic ldr vleroff ldr 23 gmthu6 ldr gmthu5 ldr gmthu4 ldr gmthu3 ldr gmthu2 ldr gmthu1 ldr gmthu0 ldr hps1off ldr 24 gmthl6 ldr gmthl5 ldr gmthl4 ldr gmthl3 ldr gmthl2 ldr gmthl1 ldr gmthl0 ldr hpe2off ldr 25 gmas4 ldr gmas3 ldr gmas2 ldr gmas1 ldr gmas0 ldr mmtc3 ldr mmtc2 ldr hpexoff ldr 26 gmam4 ldr gmam3 ldr gmam2 ldr gmam1 ldr gmam0 ldr mmtc1 ldr mmtc0 ldr vlexoff ldr 27 mmthl6 ldr mmthl5 ldr mmthl4 ldr mmthl3 ldr mmthl2 ldr mmthl1 ldr mmthl0 ldr x 28 nmline4 ldr nmline3 ldr nmline2 ldr nmline1 ldr nmline0 ldr svalli1 ldr svalli0 ldr x 29 thli25 ldr thli24 ldr thli23 ldr thli22 ldr thli21 ldr thli20 ldr thli14 ldr thli13 ldr 2a thli12 ldr thli11 ldr thli10 ldr thli03 ldr thli02 ldr thli01 ldr thli00 ldr thfi34 ldr 2b thfi33 ldr thfi32 ldr thfi31 ldr thfi30 ldr thfi24 ldr thfi23 ldr thfi22 ldr thfi21 ldr 2c thfi20 ldr thfi14 ldr thfi13 ldr thfi12 ldr thfi11 ldr thfi10 ldr thfi03 ldr thfi02 ldr 2d thfi01 ldr thfi00 ldr thfr34 ldr thfr33 ldr thfr32 ldr thfr31 ldr thfr30 ldr thfr24 ldr 2e thfr23 ldr thfr22 ldr thfr21 ldr thfr20 ldr thfr13 ldr thfr12 ldr thfr11 ldr thfr10 ldr
sda 9400 micronas 68 preliminary data sheet x = don?t care isc - input sync controller block ifc - input format conversion block osc - output sync controller block ofc - output format conversion block ldr - low data rate block hdr - high data rate block mc - memory controller pll1 - clock doubling block 1 pll2 - clock doubling block 2 2f thfr03 ldr thfr02 ldr thfr01 ldr thfr00 ldr svalfi1 ldr svalfi0 ldr svalfr1 ldr svalfr0 ldr 30 thyon resmov thrmov4 ldr thrmov3 ldr thrmov2 ldr thrmov1 ldr thrmov0 ldr x 31 swgm1 swgm0 thrgm4 ldr thrgm3 ldr thrgm2 ldr thrgm1 ldr thrgm0 ldr x 32 noisme4 ldr noisme3 ldr noiseme2 ldr noiseme1 ldr noiseme0 ldr version2 version1 version0 33 gmotion ldr movmo ldr movph ldr tvmode ldr vistatus osstatus mdstatus nmstatus ff xxxxxxxx
sda 9400 micronas 69 preliminary data sheet 6.8.4 detailed description default values are underlined. subaddress 00 bit name function d7...d6 format input format: 11: full ccir 656 10: ccir 656 only data, h- and v-sync according ccir656 01: ccir 656 only data, h- and v-sync according pal/ntsc 00: 4:2:2 d5 fieinv field polarity inversion: 1: field a=1, field b=0 0: field a=0, field b=1 d4 vcrmode input filtering of the incoming field signal: 1: on 0: off d3 pimode picture insert mode (see verwidth, verpos, horwidth, horpos): 1: on 0: off d2...d1 napipph (lsbs of naplip) number of not active pixels from external hin to the input data in system clocks of clk1: number(hin to input data) = (napipdl*4+napipph+8) [napipph = 0 ] d0 twoin chrominance input format: 1: 2?s complement input (-128...127) 0: unsigned input (0...255) inside the sda 9400 the data are always processed as unsigned data subaddress 01 bit name function d7...d2 vindel vin input delay: delay(vin to internal v-sync) = (128 * vindel + 1)*tclk1 [vindel = 0 ] d1 vinpol vin polarity: 1: low active 0: high active d0 hinpol hin polarity: 1: low active 0: high active
sda 9400 micronas 70 preliminary data sheet subaddress 02 bit name function d7...d2 nalip number of not active lines per field in the input data stream: not active lines = nalip+3 [nalip= 20 ] d1 pll1off pll1 switch: 1: off 0: on d0 refresh internal refresh: 1: on 0: off subaddress 03 bit name function d7...d0 alpfip number of active lines per field in the input data stream: active lines = alpfip * 2 [alpfip=144 ] subaddress 04 bit name function d7...d0 napipdl (msbs of naplip) number of not active pixels from hin to the input data in system clocks of clk1: number(hin to input data) = (4 * napipdl + napipph + 8) [napipdl= 0 ] subaddress 05 bit name function d7...d2 applip number of active pixels per line in the input data stream in system clocks of clk1: active pixels = applip*32 [applip = 45 ] inside the sda 9400 the number of active pixels per line is appl*32, with appl = applip, mulitpic = 0 and hdecon = 0 (applip + 1)/2, multipic = 0 and hdecon = 1 (applip + 3)/4, multipic = 0 and hdecon = 2 45, multipic > 0 d1...d0 x x
sda 9400 micronas 71 preliminary data sheet subaddress 06 bit name function d7...d0 opdel output processing delay (in number of lines): delay(vin to vout) = (opdel + 1) * tline [opdel = 170 ] subaddress 07 bit name function d7...d0 verwidth vertical width of inserted picture in input lines: vertical width = (2 * verwidth) [verwidth = 0 ] subaddress 08 bit name function d7...d0 verpos vertical position of inserted picture in input lines: vertical position = (2 * verpos) + nalip + 3 [verpos = 0 ] subaddress 09 bit name function d7...d2 horwidth horizontal width of inserted picture in system clocks of clk1: horizontal width = (32 * horwidth) [horwidth = 0 ] d1...d0 pll1ra(1...0) pll1 range, only for test purposes [ppl1ra=0 ] subaddress 0a bit name function d7...d2 horpos horizontal position of inserted picture in system clocks of clk1: horizontal position = (32 * horpos) + (4 * napipdl + napipph + 8) [horpos = 0 ] d1...d0 pll1ra(3...2) pll1 range, only for test purposes [ppl1ra=0 ]
sda 9400 micronas 72 preliminary data sheet subaddress 0b bit name function d7...d0 nalop number of not active lines per frame in the output data stream: not active lines = 2 * (nalop + 1) [nalop= 22] subaddress 0c bit name function d7...d0 alpfop number of active lines per output frame: active lines = 4 * alpfop [alpfop= 144 ] subaddress 0d bit name function d7...d0 lpfop number of lines per output frame (only valid for voutfr=1): number of lines = 4 * lpfop + 1 [lpfop = 156 ] subaddress 0e bit name function d7...d0 napop number of not active pixels (coloured border values) from external href to the first active pixel of the output data stream in system clocks of x1/ clk2: distance(href to output data) = (4 * napop) [napop = 0 ] subaddress 0f bit name function d7...d0 houtdel hout delay: delay(hout to href) = (4 * (houtdel + 1) + 36) *tx1/clk2 [houtdel = 4 ]
sda 9400 micronas 73 preliminary data sheet subaddress 10 bit name function d7...d2 applop number of active pixels per line (including coloured border values and data) in the output data stream in system clocks of x1/clk2 (length of href): active pixels = 16 * applop [applop = 45 ] d1...d0 capp reduces the active pixels per line (appl) at the output side: active pixels per line at the output side in system clocks of x1/clk2 = 16 * appl - 2 * k k = 24: capp = 11 16: capp = 10 8: capp = 01 0: capp = 00 subaddress 11 bit name function d7...d0 pplop(7...0) number of pixels between two output h-syncs hout (only valid for houtfr=1) in system clocks of x1/clk2 (bit 7 to 0): number of pixels = 2 * pplop [pplop = 432 ] subaddress 12 bit name function d7 pplop(8) number of pixels between two output h-syncs hout (only valid for houtfr=1) in system clocks of x1/clk2 (bit 8): number of pixels = 2 * pplop [pplop = 432 ] d6...d3 stopmode static operation modes (see also operation mode generator on page 46): 1011: soft mix ii (interlaced) d2...d0 adopmode dynamic operation modes (see also operation mode generator on page 46 ): 000: no adaptive operation mode: operation mode defined by stop- mode
sda 9400 micronas 74 preliminary data sheet subaddress 13 bit name function d7...d6 intmode(3...2) free programmable interlaced signal for ac coupled deflection stages (bit 3 and bit 2) [intmode3...2 = 0 ] d5...d0 verint vertical expansion factor (see also high data rate processing (hdr) on page 60): 63: no vertical expansion : 47: vertical expansion with factor 1.5 : 31: vertical expansion with factor 2 : subaddress 14 bit name function d7...d6 intmode(1...0) free programmable interlaced signal for ac coupled deflection stages (bit 1 and bit 0) [intmode1...0 = 0 ] d5 exsyn external synchronization (only valid for houtfr=0 and voutfr=0): 1: on 0: of f d4 rmode raster mode: 1: progressive 0: interlaced d3 voutfr vout generator: 1: freerunning mode 0: locked mode d2 houtfr hout generator 1: freerunning mode 0: locked mode d1 voutpol vout (exsyn=0), vext (exsyn=1) polarity: 1: low active 0: high active d0 houtpol hout (exsyn=0), hext (exsyn=1) polarity: 1: low active 0: high active
sda 9400 micronas 75 preliminary data sheet subaddress 15 bit name function d7 windvon vertical window: 1: on 0: off d6 windvdr 1: close the vertical window 0: open the vertical window d5 windvst status of vertical window after entering vertical window mode: 1: window is opened 0: window is closed d4...d3 windvsp speed of vertical window (see also window generator on page 57): 11: very fast 10: fast 01: medium 00: slow d2...d0 conv defines scan rate conversion mode (only valid for voutfr=0, see also vout generator on page 44): 000: 100/120 interlaced (rmode=0), 50/60 hz progressive (rdmode=1) subaddress 16 bit name function d7 windhon horizontal window: 1: on 0: off d6 windhdr 1: close the horizontal window 0: open the horizontal window d5 windhst status of horizontal window after entering horizontal window mode: 1: window is opened 0: window is closed d4...d3 windhsp speed of horizontal window (see also window generator on page 57): 11: very fast 10: fast 01: medium 00: slow d2 clkouton output of system clock clkout: 1: enabled 0: disabled d1 pll2off pll2 switch: 1: off 0: on d0 x x
sda 9400 micronas 76 preliminary data sheet subaddress 17 bit name function d7...d4 yborder y border value (yborder(3) yborder(2) yborder(1) yborder(0) 0 0 0 0 = 00010000 = 16), yborder defines the 4 msb?s of a 8 bit value d3 flashon flash of output picture: 1: on 0: off d2 twoout chrominance output format: 1: 2?s complement input (-128...127) 0: unsigned input (0...255) inside the sda 9400 the data are always processed as unsigned data d1 fixshr fixed temporal filtering on: 1: on 0: off d0 medon used filter type for raster interpolation: 1: median 0: linear subaddress 18 bit name function d7...d4 uborder u border value (uborder(3) uborder(2) uborder(1) uborder(0) 0 0 0 0 = 10000000 = 128), uborder defines the 4 msb?s of a 8 bit value d3...d0 vborder v border value (vborder(3) vborder(2) vborder(1) vborder(0) 0 0 0 0 = 10000000 = 128), vborder defines the 4 msb?s of a 8 bit value subaddress 19 bit name function d7...d4 pll2ra pll2 range, only for test purposes [ppl2ra=0 ] d3 clk21en pll2 input signal (see also clock concept on page 37): 1: external clk1 0: external x1/clk2 d2 clk11en internal clock switch for clkout (see also clock concept on page 37 ): 1: pll2 output 0: external clk1 d1 csmoff temporal mixing i: 1: off 0: on
sda 9400 micronas 77 preliminary data sheet d0 psmoff temporal mixing ii: 1: off 0: on subaddress 1a bit name function d7...d0 vpan vertical adjustment of the output picture [vpan = 0 ] subaddress 1b bit name function d7...d6 multipic multipicture modes: 11: sixteenfold 10: twelvefold 01: fourfold 00: off (in case of multipic>0, spatial and temporal noise reduction as well as the motion detection for scan rate conversion are disabled) d5...d2 picpos position for the picture in the multipicture mode (only valid for multipic > 0, see also multipicture display on page 20) [picpos = 0 ] d1 freeze freeze mode (frozen picture): 1: on 0: off d0 freqr frequency of system clock x1/clk2: 1: x1/clk2 > 27 mhz + 10% 0: x1/clk2 <= 27 mhz + 10% subaddress 19 bit name function
sda 9400 micronas 78 preliminary data sheet subaddress 1c bit name function d7...d5 vdecon vertical decimation of the input data stream: 111: not used 110: factor 4.0 101: factor 3.0 100: factor 2.0 011: factor 1.75 010: factor 1.5 001: factor 1.25 000: off (in case of vdecon>0, spatial noise reduction as well as the motion detection for scan rate conversion are disabled) d4...d3 hdecon horizontal decimation of the input data stream: 11: not used 10: factor 4.0 01: factor 2.0 00: off (in case of hdecon>0, spatial noise reduction as well as the motion detection for scan rate conversion are disabled) d2...d1 ammon automatic movie mode for the motion detection for the scan rate conversion: in case of movie mode, the motion detection for scan rate conversion will be automatically switched to 11: no motion 10: only frame difference 0x: off d0 frafion motion detection for the scan rate conversion: 1: based on frame difference and field difference 0: based only on frame difference (in case of ammon>1 and no movie mode, the motion detection for scan rate conversion is still defined by frafion) subaddress 1d bit name function d7 nron temporal noise reduction of luminance and chrominance: 1: enabled 0: disabled d6 snron spatial noise reduction of luminance: 1: enabled 0: disabled d5 vcsnron vertical spatial noise reduction of chrominance: 1: enabled 0: disabled
sda 9400 micronas 79 preliminary data sheet d4 hcsnron horizontal spatial noise reduction of chrominance: 1: enabled 0: disabled d3 dtnron temporal noise reduction of luminance: 1: frame based 0: field based d2 movphin inversion of the movph signal: 1: enabled 0: disabled d1 tnrsel motion detection of temporal noise reduction of chrominance: 1: separate motion detector 0: luminance motion detector d0 nmalg noise measurement algorithm: 1: measurement during vertical blanking period (line can be defined by nmline) 0: measurement in the active picture (first active line) subaddress 1e bit name function d7...d4 tnrcly temporal noise reduction of luminance: classification 1111: slight noise reduction : 0000: strong noise reduction d3...d0 tnrclc temporal noise reduction of chrominance: classification 1111: slight noise reduction : 0000: strong noise reduction subaddress 1f bit name function d7...d4 tnrkoy temporal noise reduction of luminance: vertical shift of the motion detector characteristic [tnrkoy=0 ] d3...d0 tnrkoc temporal noise reduction of chrominance: vertical shift of the motion detector characteristic [tnrkoc=0 ] subaddress 1d bit name function
sda 9400 micronas 80 preliminary data sheet subaddress 20 bit name function d7...d4 tnrvay fixed k-factor for temporal noise reduction of luminance [tnrvay = 15 ] d3...d0 tnrvac fixed k-factor for temporal noise reduction of chrominance [tnrvac = 15 ] subaddress 21 bit name function d7...d2 tnrhoy temporal noise reduction of luminance: horizontal shift of the motion detector characteristic [tnrhoy=0 ] d1 tnrfiy fixed k-factor switch for temporal noise reduction of luminance: 1: off 0: on d0 hpe1off horizontal pixel erosion 1 of motion detection for scan rate conversion: 1: off 0: on subaddress 22 bit name function d7...d2 tnrhoc temporal noise reduction of chrominance: horizontal shift of the motion detector characteristic [tnrhoc=0 ] d1 tnrfic fixed k-factor switch for temporal noise reduction of chrominance: 1: off 0: on d0 vleroff vertical line erosion of motion detection for scan rate conversion: 1: off 0: on subaddress 23 bit name function d7...d1 gmthu global motion detection spatial hysteresis: upper threshold [gmthu =68 ] d0 hps1off horizontal pixel smearing 1 of motion detection for scan rate conversion: 1: off 0: on
sda 9400 micronas 81 preliminary data sheet subaddress 24 bit name function d7...d1 gmthl global motion detection spatial hysteresis: lower threshold [gmthl =67 ] d0 hpe2off horizontal pixel erosion 2 of motion detection for scan rate conversion: 1: off 0: on subaddress 25 bit name function d7...d3 gmas global motion detection amount of still pictures [gmas = 29 ] d2...d1 mmtc(3...2) movie mode detection time constant [mmtc3...2 = 2 ] d0 hpexoff horizontal pixel extension of motion detection for scan rate conversion: 1: off 0: on subaddress 26 bit name function d7...d3 gmam global motion detection amount of moving pictures [gmam = 16 ] d2...d1 mmtc(1...0) movie mode detection time constant [mmtc1...0 = 2 ] d0 vlexoff vertical line extension of motion detection for scan rate conversion: 1: off 0: on subaddress 27 bit name function d7...d1 mmthl movie mode detection threshold [mmthl = 12 ] d0 x x
sda 9400 micronas 82 preliminary data sheet subaddress 28 bit name function d7...d3 nmline line for noise measurement (only valid for nmalg=1) [nmline = 4 ] d2...d1 svalli sensitivity of line difference in the motion detection for scan rate conversion: 11: factor 32 (minimum) 10: factor 16 01: factor 8 00: factor 4 (maximum) d0 x x subaddress 29 bit name function d7...d2 thli2 threshold 2 of line difference in the motion detection for scan rate conversion [thli2 = 12 ] d1...d0 thli1(4...3) threshold 1 (bit 4 and bit 3) of line difference in the motion detection for scan rate conversion [thli14...3 = 1 ] subaddress 2a bit name function d7...d5 thli1(2...0) threshold 1 (bit 2, bit 1 and bit 0) of line difference in the motion detection for scan rate conversion [thli12...0 = 0 ] d4...d1 thli0 threshold 0 of line difference in the motion detection for scan rate conversion [thli0 = 4 ] d0 thfi3(4) threshold 3 (bit 4) of field difference in the motion detection for scan rate conversion [thfi34 = 1 ] subaddress 2b bit name function d7...d4 thfi3(3...0) threshold 3 (bit 3, bit 2,bit 1and bit 0) of field difference in the motion detection for scan rate conversion [thfi33...0 = 12 ] d3...d0 thfi2(4...1) threshold 2 (bit 4, bit3, bit 2 and bit 1) of field difference in the motion detection for scan rate conversion [thfi24...1 = 9 ]
sda 9400 micronas 83 preliminary data sheet subaddress 2c bit name function d7 thfi2(0) threshold 2 (bit 0) of field difference in the motion detection for scan rate conversion [thfi20 = 0 ] d6...d2 thfi1 threshold 1 of field difference in the motion detection for scan rate conversion [thfi1 = 16 ] d1...d0 thfi0(3...2) threshold 0 (bit 3 and bit 2) of field difference in the motion detection for scan rate conversion [thfi03...2 = 2 ] subaddress 2d bit name function d7...d6 thfi0(1...0) threshold 0 (bit 1 and bit 0) of field difference in the motion detection for scan rate conversion [thfi01...0 = 0 ] d5...d1 thfr3 threshold 3 of frame difference in the motion detection for scan rate conversion [thfr3 = 10 ] d0 thfr2(4) threshold 2 (bit 4) of frame difference in the motion detection for scan rate conversion [thfr24 = 0 ] subaddress 2e bit name function d7...d4 thfr23...0 threshold 2 (bit 3, bit2, bit1 and bit 0) of frame difference in the motion detection for scan rate conversion [thfr23...0 = 6 ] d3...d0 thfr1 threshold 1 of frame difference in the motion detection for scan rate conversion [thfr1 = 4 ] subaddress 2f bit name function d7...d4 thfr0 threshold 0 of frame difference in the motion detection for scan rate conversion [thfr0 = 3 ] d3...d2 svalfi sensitivity of field difference in the motion detection for scan rate conversion: 11: factor 8 (minimum) 10: factor 4 01: factor 2 00: factor 1 (maximum)
sda 9400 micronas 84 preliminary data sheet d1...d0 svalfr sensitivity of frame difference in the motion detection for scan rate conversion: 11: factor 8 (minimum) 10: factor 4 01: factor 2 00: factor 1 (maximum) subaddress 30 bit name function d7 thyon time hysteresis for movie mode detection on/off: 1: on (camera->movie: 2*(mmtc+1); movie->camera: (mmtc+1) 0: off (2*(mmtc+1)) d6 resmov reset of movie detection time hysteresis queue 1: reset: movmo=0 (camera mode) 0: no reset d5...d1 thrmov threshold of field difference in the motion detection for movie mode detection [thrmov = 8 ] d0 x x subaddress 31 bit name function d7...d6 swgm switch for global motion detection 11: field difference not influenced by motion detection for src 10: field difference, influenced by motion detection for src 01: frame difference, not influenced by motion detection for src 00: frame difference, influenced by motion detection for src d5...d1 thrgm threshold of frame difference in the motion detection for global motion detection [thrgm = 8 ] d0 x x subaddress 32 bit name function d7...d3 noiseme noise level of the input signal: 0 (no noise), ..., 30 (strong noise) [31 (strong noise or measurement failed )] subaddress 2f bit name function
sda 9400 micronas 85 preliminary data sheet d2...d0 version version of sda 94xx family: 000: sda 9400 001: sda 9401 010: sda 9402 subaddress 33 bit name function d7 gmotion global motion detection: motion value 1: motion in the picture 0: no motion in the picture d6 movmo movie mode detection: 1: movie mode 0: camera mode d5 movph movie phase detection: 1: a n and b n-1 have the same phase 0: b n and a n and have the same phase d4 tvmode tv mode of the input signal 1: ntsc 0: pal d3 vistatus status bit for subaddresses, which will be made valid by vin 1: new write or read cycle can start 0: no new write or read cycle can start d2 osstatus status bit for subaddresses, which will be made valid by opstart 1: new write or read cycle can start 0: no new write or read cycle can start d1 mdstatus status bit for motion detection parameters: 1: one of gmotion, movmo, movph and tvmode changed its value 0: none of gmotion, movmo, movph and tvmode changed its value d0 nmstatus status bit for noise measurement parameter: 1: new value of noiseme available 0: no new value of noiseme available subaddress ff bit name function d7...d0 store command for all subaddresses subaddress 32 bit name function
sda 9400 micronas 86 preliminary data sheet 7 absolute maximum ratings all voltages listed are referenced to ground (0v, v ss ) except where noted. absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions or at any other condition beyond those indicated in the operational sections of this specification is not implied. parameter symbol min max unit remark operating temperature t a 070 c storage temperature t stg -65 125 c junction temperature t j 125 c soldering temperature t s 260 c soldering time ts 10 s input voltage v i -0.3 v dd +0.3 v not valid for i2c bus pins output voltage v o -0.3 v dd +0.3 v not valid for i2c bus pins input voltage v i -0.3 5.5 v i2c bus pins only output voltage v o -0.3 5.5 v i2c bus pins only supply voltages v dd -0.3 3.8 v total power dissipation thd 1 w esd protection esd -2,0 2,0 kv mil std 883c method 3015.6, 100pf, 1500 = ?_? esd protection esd -1,5 1,5 kv eos/esd assn. standard ds 5.3-1993 (cdm) latch-up protection -100 100 ma all inputs/outputs
sda 9400 micronas 87 preliminary data sheet 8 recommended operating conditions parameter symbol min nom max unit remark supply voltages v dd 3.15 3.3 3.45 v ambient temperature t a 0 25 70 c all ttl inputs high-level input voltage v ih 2.0 v dd +0.2 v low-level input voltage v il -0.2 0.8 v input current i in +/- 5 a all ttl outputs high-level output voltage v oh 2.4 v i oh = -2.0 ma low-level output voltage v ol 0.4 v i ol = 2.0 ma input/output: sda low-level output voltage v ol 0.5 v at i ol = max clock ttl input clk1 clock frequency 1/t 27 mhz see diagr. 11.3 low time t wl 10 ns high time t wh 10 ns rise time t tlh 10 ns fall time t thl 10 ns input syncen low time t wl2 22 ns see diagr. 11.3 high time t wh2 22 ns rise time t tlh2 10 ns fall time t thl2 10 ns clock ttl input x1/clk2 clock frequency 1/t 40.5 mhz see diagr. 11.3 low time t wl 9ns high time t wh 9ns rise time t tlh 3ns fall time t thl 3ns i2c bus (all values are referred to min(v ih ) and max(v il )), f scl = 400 khz high-level input voltage v ih 3 5.25 v see diagr. 11.1 low-level input voltage v il 0 1.5 v see diagr. 11.2 scl clock frequency f scl 0 400 khz inactive time before start of transmission t buf 1.3 s set-up time start condition t su;sta 0.6 s
sda 9400 micronas 88 preliminary data sheet hold time start condition t hd;sta 0.6 s scl low time t low 1.3 s scl high time t high 0.6 s set-up time data t su;dat 100 ns hold time data t hd;dat 0s sda/scl rise times t r 300 ns sda/scl fall times t f 300 ns set-up time stop condition t su;sto 0.6 s output valid from clock t aa 900 ns input filter spike suppression (sda and scl pins) t sp 50 ns low-level output current i ql 3ma inputs crystal connections x1/clk2, x2 see diagr. 11.4 crystal frequency xtal 27.0 mhz fundamental crystal equivalent parallel capacitance cin 27 pf equivalent parallel capacitance cout 27 pf parameter symbol min nom max unit remark
sda 9400 micronas 89 preliminary data sheet 9 characteristics (assuming recommended operating conditions) *: see also clock concept on page 37 parameter symbol min max unit remark average supply current t.b.d. t.b.d. ma all v dd pins, typ. t.b.d.ma all digital inputs (including i/o inputs) input capacitance 10 pf input leakage current -5 5 a ttl inputs: yin, uvin, hin, vin (referenced to clk1) set-up time t su 7 ns see diagr. 11.3 input hold time t ih 6ns ttl inputs: hext, vext (referenced to x1/clk2) set-up time t su 7 ns see diagr. 11.3 input hold time t ih 6ns ttl outputs: yout, uvout, href, interlaced (referenced to clkout*) hold time t oh 6 ns see diagr. 11.3 delay time t od 25 ns c l = 30 pf, 27 mhz ttl outputs: hout, vout (referenced to clkout) hold time t oh 6 ns see diagr. 11.3 delay time t od 25 ns c l = 50 pf, 27 mhz ttl outputs: yout, uvout, href, interlaced (referenced to clkout) hold time t oh 3 ns see diagr. 11.3 delay time t od 15 ns c l = 30 pf, 40,5 mhz ttl outputs: hout, vout (referenced to clkout) hold time t oh 3 ns see diagr. 11.3 delay time t od 15 ns c l = 50 pf, 40,5 mhz ttl inputs: syncen (referenced to clk1) set-up time t su2 25 ns see diagr. 11.3 input hold time t ih2 0ns
sda 9400 micronas 90 preliminary data sheet 10 application information sda 9400 scarabaeus vpc32xxd color decoder ddp3310b deflection controller h-drive v-drive e/w cvbs y/c rgb r g b
sda 9400 micronas 91 preliminary data sheet 11 waveforms 11.1 i2c-bus timing start/stop 11.2 i2c-bus timing data i2ctimd01 bus timing data i2ctimdat scl sda in sda out t sp t aa t aa t su;sta t hd;sta t f t high t low t hd;sta t su;dat t r t su;sto t buf
sda 9400 micronas 92 preliminary data sheet 11.3 timing diagram clock 11.4 clock circuit diagram v ih v il clk1 clkout t t wh t wl t hl t lh syncen t lh2 t hl2 t wl2 t wh2 datain datain dataout dataout t su t od t ih t oh t ih2 t su2 x1/clk2 x2 quartz xtal cin cout
sda 9400 micronas 93 preliminary data sheet 12 package outlines p-mqfp-64 [all dimensions in mm]
all information and data contained in this data sheet are without any commitment, are not to be considered as an offer for conclusion of a contract, nor shall they be construed as to create any liability. any new issue of this data sheet invalidates previous issues. product availability and delivery are exclusively subject to our respective order confirmation form; the same applies to orders based on development samples deliv- ered. by this publication, micronas gmbh does not assume responsibil- ity for patent infringements or other rights of third parties which may result from its use. further, micronas gmbh reserves the right to revise this publication and to make changes to its content, at any time, without obligation to notify any person or entity of such revisions or changes. no part of this publication may be reproduced, photocopied, stored on a retrieval system, or transmitted without the express written consent of micronas gmbh. sda 9400 preliminary data sheet 94 micronas micronas gmbh hans-bunte-strasse 19 d-79108 freiburg (germany) p.o. box 840 d-79008 freiburg (germany) tel. +49-761-517-0 fax +49-761-517-2174 e-mail: docservice@micronas.com internet: www.micronas.com printed in germany order no. 6251-551-1pd

▲Up To Search▲

Price & Availability of SDA9400

	To Download SDA9400 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .